Configurable serial usart timeout (#11057)
parent
485e4524f4
commit
990d5189d1
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@ -60,6 +60,7 @@ Configure the hardware via your config.h:
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// 5: about 19200 baud
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// 5: about 19200 baud
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#define SERIAL_USART_DRIVER SD1 // USART driver of TX pin. default: SD1
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#define SERIAL_USART_DRIVER SD1 // USART driver of TX pin. default: SD1
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#define SERIAL_USART_TX_PAL_MODE 7 // Pin "alternate function", see the respective datasheet for the appropriate values for your MCU. default: 7
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#define SERIAL_USART_TX_PAL_MODE 7 // Pin "alternate function", see the respective datasheet for the appropriate values for your MCU. default: 7
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#define SERIAL_USART_TIMEOUT 100 // USART driver timeout. default 100
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```
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```
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You must also enable the ChibiOS `SERIAL` feature:
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You must also enable the ChibiOS `SERIAL` feature:
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@ -58,7 +58,10 @@
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# error invalid SELECT_SOFT_SERIAL_SPEED value
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# error invalid SELECT_SOFT_SERIAL_SPEED value
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#endif
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#endif
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#define TIMEOUT 100
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#ifndef SERIAL_USART_TIMEOUT
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# define SERIAL_USART_TIMEOUT 100
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#endif
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#define HANDSHAKE_MAGIC 7
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#define HANDSHAKE_MAGIC 7
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static inline msg_t sdWriteHalfDuplex(SerialDriver* driver, uint8_t* data, uint8_t size) {
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static inline msg_t sdWriteHalfDuplex(SerialDriver* driver, uint8_t* data, uint8_t size) {
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@ -201,21 +204,21 @@ int soft_serial_transaction(int index) {
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sdClear(&SERIAL_USART_DRIVER);
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sdClear(&SERIAL_USART_DRIVER);
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// First chunk is always transaction id
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// First chunk is always transaction id
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sdWriteTimeout(&SERIAL_USART_DRIVER, &sstd_index, sizeof(sstd_index), TIME_MS2I(TIMEOUT));
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sdWriteTimeout(&SERIAL_USART_DRIVER, &sstd_index, sizeof(sstd_index), TIME_MS2I(SERIAL_USART_TIMEOUT));
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uint8_t sstd_index_shake = 0xFF;
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uint8_t sstd_index_shake = 0xFF;
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// Which we always read back first so that we can error out correctly
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// Which we always read back first so that we can error out correctly
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// - due to the half duplex limitations on return codes, we always have to read *something*
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// - due to the half duplex limitations on return codes, we always have to read *something*
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// - without the read, write only transactions *always* succeed, even during the boot process where the slave is not ready
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// - without the read, write only transactions *always* succeed, even during the boot process where the slave is not ready
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res = sdReadTimeout(&SERIAL_USART_DRIVER, &sstd_index_shake, sizeof(sstd_index_shake), TIME_MS2I(TIMEOUT));
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res = sdReadTimeout(&SERIAL_USART_DRIVER, &sstd_index_shake, sizeof(sstd_index_shake), TIME_MS2I(SERIAL_USART_TIMEOUT));
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if (res < 0 || (sstd_index_shake != (sstd_index ^ HANDSHAKE_MAGIC))) {
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if (res < 0 || (sstd_index_shake != (sstd_index ^ HANDSHAKE_MAGIC))) {
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dprintf("serial::usart_shake NO_RESPONSE\n");
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dprintf("serial::usart_shake NO_RESPONSE\n");
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return TRANSACTION_NO_RESPONSE;
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return TRANSACTION_NO_RESPONSE;
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}
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}
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if (trans->initiator2target_buffer_size) {
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if (trans->initiator2target_buffer_size) {
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res = sdWriteTimeout(&SERIAL_USART_DRIVER, trans->initiator2target_buffer, trans->initiator2target_buffer_size, TIME_MS2I(TIMEOUT));
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res = sdWriteTimeout(&SERIAL_USART_DRIVER, trans->initiator2target_buffer, trans->initiator2target_buffer_size, TIME_MS2I(SERIAL_USART_TIMEOUT));
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if (res < 0) {
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if (res < 0) {
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dprintf("serial::usart_transmit NO_RESPONSE\n");
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dprintf("serial::usart_transmit NO_RESPONSE\n");
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return TRANSACTION_NO_RESPONSE;
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return TRANSACTION_NO_RESPONSE;
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@ -223,7 +226,7 @@ int soft_serial_transaction(int index) {
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}
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}
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if (trans->target2initiator_buffer_size) {
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if (trans->target2initiator_buffer_size) {
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res = sdReadTimeout(&SERIAL_USART_DRIVER, trans->target2initiator_buffer, trans->target2initiator_buffer_size, TIME_MS2I(TIMEOUT));
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res = sdReadTimeout(&SERIAL_USART_DRIVER, trans->target2initiator_buffer, trans->target2initiator_buffer_size, TIME_MS2I(SERIAL_USART_TIMEOUT));
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if (res < 0) {
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if (res < 0) {
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dprintf("serial::usart_receive NO_RESPONSE\n");
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dprintf("serial::usart_receive NO_RESPONSE\n");
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return TRANSACTION_NO_RESPONSE;
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return TRANSACTION_NO_RESPONSE;
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