Merge remote-tracking branch 'origin/master' into develop
QMK Bot
commit
7de801ed9a
|
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@ -0,0 +1,42 @@
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|||
/* Copyright 2019 /u/KeepItUnder
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
#include "quantum.h"
|
||||
|
||||
#define XXX KC_NO
|
||||
|
||||
/* This a shortcut to help you visually see your layout.
|
||||
*
|
||||
* The first section contains all of the arguments representing the physical
|
||||
* layout of the board and position of the keys.
|
||||
*
|
||||
* The second converts the arguments into a two-dimensional array which
|
||||
* represents the switch matrix.
|
||||
*/
|
||||
#define LAYOUT_all( \
|
||||
k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0d, k0e, \
|
||||
k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, k1d, k1e, \
|
||||
k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, k2c, k2d, k2e, \
|
||||
k30, k31, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, k3c, k3d, \
|
||||
k40, k41, k42, k45, k4a, k4b, k4c, k4d, k4e, k4f \
|
||||
) { \
|
||||
{ k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0d, k0e }, \
|
||||
{ k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, k1d, k1e }, \
|
||||
{ k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, k2c, k2d, k2e }, \
|
||||
{ k30, k31, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, k3c, k3d, }, \
|
||||
{ k40, k41, k42, XXX, XXX, k45, XXX, XXX, XXX, k4a, k4b, k4c, k4d, k4e, k4f } \
|
||||
}
|
||||
|
|
@ -0,0 +1,57 @@
|
|||
/*
|
||||
ChibiOS Driver element - Copyright (C) 2019 /u/KeepItUnder
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief PAL setup.
|
||||
* @details Digital I/O ports static configuration as defined in @p board.h.
|
||||
* This variable is used by the HAL when initializing the PAL driver.
|
||||
*/
|
||||
const PALConfig pal_default_config = {
|
||||
# if NUC123_HAS_GPIOA
|
||||
{VAL_GPIOA_PMD, VAL_GPIOA_OFFD, VAL_GPIOA_DMASK, VAL_GPIOA_DBEN, VAL_GPIOA_IMD, VAL_GPIOA_IEN, VAL_GPIOA_ISRC, VAL_GPIOA_DOUT},
|
||||
# endif
|
||||
# if NUC123_HAS_GPIOB
|
||||
{VAL_GPIOB_PMD, VAL_GPIOB_OFFD, VAL_GPIOB_DMASK, VAL_GPIOB_DBEN, VAL_GPIOB_IMD, VAL_GPIOB_IEN, VAL_GPIOB_ISRC, VAL_GPIOB_DOUT},
|
||||
# endif
|
||||
# if NUC123_HAS_GPIOC
|
||||
{VAL_GPIOC_PMD, VAL_GPIOC_OFFD, VAL_GPIOC_DMASK, VAL_GPIOC_DBEN, VAL_GPIOC_IMD, VAL_GPIOC_IEN, VAL_GPIOC_ISRC, VAL_GPIOC_DOUT},
|
||||
# endif
|
||||
# if NUC123_HAS_GPIOD
|
||||
{VAL_GPIOD_PMD, VAL_GPIOD_OFFD, VAL_GPIOD_DMASK, VAL_GPIOD_DBEN, VAL_GPIOD_IMD, VAL_GPIOD_IEN, VAL_GPIOD_ISRC, VAL_GPIOD_DOUT},
|
||||
# endif
|
||||
# if NUC123_HAS_GPIOF
|
||||
{VAL_GPIOF_PMD, VAL_GPIOF_OFFD, VAL_GPIOF_DMASK, VAL_GPIOF_DBEN, VAL_GPIOF_IMD, VAL_GPIOF_IEN, VAL_GPIOF_ISRC, VAL_GPIOF_DOUT},
|
||||
# endif
|
||||
};
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Early initialization code.
|
||||
* @details This initialization must be performed just after stack setup
|
||||
* and before any other initialization.
|
||||
*/
|
||||
void __early_init(void) {
|
||||
NUC123_clock_init();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Board-specific initialization code.
|
||||
* @todo Add your board-specific code, if any.
|
||||
*/
|
||||
void boardInit(void) {}
|
||||
|
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@ -0,0 +1,961 @@
|
|||
/*
|
||||
ChibiOS Driver element - Copyright (C) 2019 /u/KeepItUnder
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef BOARD_H
|
||||
#define BOARD_H
|
||||
|
||||
/*
|
||||
* Setup for Generic NUC123 board.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Board identifier.
|
||||
*/
|
||||
#define BOARD_NUC123SD4AN0
|
||||
#define BOARD_NAME "Nuvoton NUC123SD4AN0 MCU"
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||||
|
||||
/*
|
||||
* Board oscillators-related settings.
|
||||
* NOTE: LSE not fitted.
|
||||
* NOTE: HSE is fitted.
|
||||
*/
|
||||
#if !defined(NUC123_LSECLK)
|
||||
#define NUC123_LSECLK 0U
|
||||
#endif
|
||||
|
||||
#define NUC123_LSEDRV (3U << 3U)
|
||||
|
||||
#if !defined(NUC123_HSECLK)
|
||||
#define NUC123_HSECLK 12000000U
|
||||
#endif
|
||||
|
||||
//#define NUC123_HSE_BYPASS
|
||||
|
||||
/*
|
||||
* MCU type as defined in the NUC123 header.
|
||||
*/
|
||||
#define NUC123SD4AN0
|
||||
|
||||
/*
|
||||
* GPIO Multi Function Pin USB Setup
|
||||
* Requires Some GPIO pins to be disabled/set to USB
|
||||
*/
|
||||
|
||||
/*
|
||||
* IO pins assignments.
|
||||
*/
|
||||
#define GPIOA_PIN0 0U
|
||||
#define GPIOA_PIN1 1U
|
||||
#define GPIOA_PIN2 2U
|
||||
#define GPIOA_PIN3 3U
|
||||
#define GPIOA_PIN4 4U
|
||||
#define GPIOA_PIN5 5U
|
||||
#define GPIOA_PIN6 6U
|
||||
#define GPIOA_PIN7 7U
|
||||
#define GPIOA_PIN8 8U
|
||||
#define GPIOA_PIN9 9U
|
||||
#define GPIOA_SPI1_MISO0 10U
|
||||
#define GPIOA_SPI1_CLK 11U
|
||||
#define GPIOA_PWM0 12U
|
||||
#define GPIOA_PWM1 13U
|
||||
#define GPIOA_PWM2 14U
|
||||
#define GPIOA_PWM3 15U
|
||||
|
||||
#define GPIOB_UART0_RXD 0U
|
||||
#define GPIOB_UART0_TXD 1U
|
||||
#define GPIOB_UART0_RTS 2U
|
||||
#define GPIOB_UART0_CTS 3U
|
||||
#define GPIOB_UART1_RXD 4U
|
||||
#define GPIOB_UART1_TXD 5U
|
||||
#define GPIOB_UART1_RTS 6U
|
||||
#define GPIOB_UART1_CTS 7U
|
||||
#define GPIOB_TM0 8U
|
||||
#define GPIOB_TM1 9U
|
||||
#define GPIOB_TM2 10U
|
||||
#define GPIOB_PIN11 11U
|
||||
#define GPIOB_CLK0 12U
|
||||
#define GPIOB_PIN13 13U
|
||||
#define GPIOB_INT0 14U
|
||||
#define GPIOB_INT1 15U
|
||||
|
||||
#define GPIOC_PIN0 0U
|
||||
#define GPIOC_PIN1 1U
|
||||
#define GPIOC_PIN2 2U
|
||||
#define GPIOC_PIN3 3U
|
||||
#define GPIOC_PIN4 4U
|
||||
#define GPIOC_PIN5 5U
|
||||
#define GPIOC_PIN6 6U
|
||||
#define GPIOC_PIN7 7U
|
||||
#define GPIOC_PIN8 8U
|
||||
#define GPIOC_PIN9 9U
|
||||
#define GPIOC_PIN10 10U
|
||||
#define GPIOC_PIN11 11U
|
||||
#define GPIOC_PIN12 12U
|
||||
#define GPIOC_PIN13 13U
|
||||
#define GPIOC_PIN14 14U
|
||||
#define GPIOC_PIN15 15U
|
||||
|
||||
#define GPIOD_ADC0 0U
|
||||
#define GPIOD_ADC1 1U
|
||||
#define GPIOD_ADC2 2U
|
||||
#define GPIOD_ADC3 3U
|
||||
#define GPIOD_ADC4 4U
|
||||
#define GPIOD_ADC5 5U
|
||||
#define GPIOD_PIN6 6U
|
||||
#define GPIOD_PIN7 7U
|
||||
#define GPIOD_PIN8 8U
|
||||
#define GPIOD_PIN9 9U
|
||||
#define GPIOD_PIN10 10U
|
||||
#define GPIOD_PIN11 11U
|
||||
#define GPIOD_PIN12 12U
|
||||
#define GPIOD_PIN13 13U
|
||||
#define GPIOD_PIN14 14U
|
||||
#define GPIOD_PIN15 15U
|
||||
|
||||
#define GPIOE_PIN0 0U
|
||||
#define GPIOE_PIN1 1U
|
||||
#define GPIOE_PIN2 2U
|
||||
#define GPIOE_PIN3 3U
|
||||
#define GPIOE_PIN4 4U
|
||||
#define GPIOE_PIN5 5U
|
||||
#define GPIOE_PIN6 6U
|
||||
#define GPIOE_PIN7 7U
|
||||
#define GPIOE_PIN8 8U
|
||||
#define GPIOE_PIN9 9U
|
||||
#define GPIOE_PIN10 10U
|
||||
#define GPIOE_PIN11 11U
|
||||
#define GPIOE_PIN12 12U
|
||||
#define GPIOE_PIN13 13U
|
||||
#define GPIOE_PIN14 14U
|
||||
#define GPIOE_PIN15 15U
|
||||
|
||||
#define GPIOF_OSC_OUT 0U
|
||||
#define GPIOF_OSC_IN 1U
|
||||
#define GPIOF_I2C0_SDA 2U
|
||||
#define GPIOF_I2C0_SCL 3U
|
||||
#define GPIOF_PIN4 4U
|
||||
#define GPIOF_PIN5 5U
|
||||
#define GPIOF_PIN6 6U
|
||||
#define GPIOF_PIN7 7U
|
||||
#define GPIOF_PIN8 8U
|
||||
#define GPIOF_PIN9 9U
|
||||
#define GPIOF_PIN10 10U
|
||||
#define GPIOF_PIN11 11U
|
||||
#define GPIOF_PIN12 12U
|
||||
#define GPIOF_PIN13 13U
|
||||
#define GPIOF_PIN14 14U
|
||||
#define GPIOF_PIN15 15U
|
||||
|
||||
/*
|
||||
* IO lines assignments.
|
||||
*/
|
||||
#define LINE_USB_DM PAL_LINE(GPIOA, 11U)
|
||||
#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
|
||||
#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
|
||||
#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
|
||||
|
||||
// #define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U)
|
||||
// #define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U)
|
||||
// #define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U)
|
||||
|
||||
#define LINE_OSC_IN PAL_LINE(GPIOF, 0U)
|
||||
#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U)
|
||||
|
||||
/*
|
||||
* I/O ports initial setup, this configuration is established soon after reset
|
||||
* in the initialization code.
|
||||
* Please refer to the NUC123 Reference Manual for details.
|
||||
*/
|
||||
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
|
||||
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
|
||||
#define PIN_MODE_OPENDRAIN(n) (2U << ((n) * 2U))
|
||||
#define PIN_MODE_QUASI(n) (3U << ((n) * 2U))
|
||||
#define PIN_DIGITAL_EN(n) (0U << (n))
|
||||
#define PIN_DIGITAL_DIS(n) (1U << (n))
|
||||
#define PIN_DMASK_DIS(n) (0U << (n))
|
||||
#define PIN_DMASK_EN(n) (1U << (n))
|
||||
#define PIN_DBNCE_DIS(n) (0U << (n))
|
||||
#define PIN_DBNCE_EN(n) (1U << (n))
|
||||
#define PIN_IMD_EDGE(n) (0U << (n))
|
||||
#define PIN_IMD_LVL(n) (1U << (n))
|
||||
#define PIN_IEN_FELL_DIS(n) (0U << (n))
|
||||
#define PIN_IEN_FELL_EN(n) (1U << (n))
|
||||
#define PIN_IEN_REHL_DIS(n) ((0U << (n)) << 16)
|
||||
#define PIN_IEN_REHL_EN(n) ((1U << (n)) << 16)
|
||||
#define PIN_ISRC_EN(n) (1U << (n))
|
||||
#define PIN_ISRC_DIS(n) (0U << (n))
|
||||
#define PIN_ISRC_CLR(n) (1U << (n))
|
||||
#define PIN_DATA_LOW(n) (0U << (n))
|
||||
#define PIN_DATA_HIGH(n) (1U << (n))
|
||||
|
||||
/*
|
||||
* GPIOA setup:
|
||||
*
|
||||
* PA0 - PIN0 (input pullup).
|
||||
* PA1 - PIN1 (input pullup).
|
||||
* PA2 - PIN2 (input pullup).
|
||||
* PA3 - PIN3 (input pullup).
|
||||
* PA4 - PIN4 (input pullup).
|
||||
* PA5 - PIN5 (input pullup).
|
||||
* PA6 - PIN6 (input pullup).
|
||||
* PA7 - PIN7 (input pullup).
|
||||
* PA8 - PIN8 (input pullup).
|
||||
* PA9 - PIN9 (input pullup).
|
||||
* PA10 - SPI1_MISO0 (input pullup).
|
||||
* PA11 - SPI1_CLK (input floating).
|
||||
* PA12 - PWM0 (input floating).
|
||||
* PA13 - PWM1 (input pullup).
|
||||
* PA14 - PWM2 (input pullup).
|
||||
* PA15 - PWM3 (input pullup).
|
||||
*/
|
||||
|
||||
#define VAL_GPIOA_PMD (PIN_MODE_INPUT(GPIOA_PIN0) | \
|
||||
PIN_MODE_INPUT(GPIOA_PIN1) | \
|
||||
PIN_MODE_INPUT(GPIOA_PIN2) | \
|
||||
PIN_MODE_INPUT(GPIOA_PIN3) | \
|
||||
PIN_MODE_INPUT(GPIOA_PIN4) | \
|
||||
PIN_MODE_INPUT(GPIOA_PIN5) | \
|
||||
PIN_MODE_INPUT(GPIOA_PIN6) | \
|
||||
PIN_MODE_INPUT(GPIOA_PIN7) | \
|
||||
PIN_MODE_INPUT(GPIOA_PIN8) | \
|
||||
PIN_MODE_INPUT(GPIOA_PIN9) | \
|
||||
PIN_MODE_INPUT(GPIOA_SPI1_MISO0) | \
|
||||
PIN_MODE_INPUT(GPIOA_SPI1_CLK) | \
|
||||
PIN_MODE_INPUT(GPIOA_PWM0) | \
|
||||
PIN_MODE_INPUT(GPIOA_PWM1) | \
|
||||
PIN_MODE_INPUT(GPIOA_PWM2) | \
|
||||
PIN_MODE_INPUT(GPIOA_PWM3))
|
||||
#define VAL_GPIOA_OFFD (PIN_DIGITAL_EN(GPIOA_PIN0) | \
|
||||
PIN_DIGITAL_EN(GPIOA_PIN1) | \
|
||||
PIN_DIGITAL_EN(GPIOA_PIN2) | \
|
||||
PIN_DIGITAL_EN(GPIOA_PIN3) | \
|
||||
PIN_DIGITAL_EN(GPIOA_PIN4) | \
|
||||
PIN_DIGITAL_EN(GPIOA_PIN5) | \
|
||||
PIN_DIGITAL_EN(GPIOA_PIN6) | \
|
||||
PIN_DIGITAL_EN(GPIOA_PIN7) | \
|
||||
PIN_DIGITAL_EN(GPIOA_PIN8) | \
|
||||
PIN_DIGITAL_EN(GPIOA_PIN9) | \
|
||||
PIN_DIGITAL_EN(GPIOA_SPI1_MISO0) | \
|
||||
PIN_DIGITAL_EN(GPIOA_SPI1_CLK) | \
|
||||
PIN_DIGITAL_EN(GPIOA_PWM0) | \
|
||||
PIN_DIGITAL_EN(GPIOA_PWM1) | \
|
||||
PIN_DIGITAL_EN(GPIOA_PWM2) | \
|
||||
PIN_DIGITAL_EN(GPIOA_PWM3))
|
||||
#define VAL_GPIOA_DMASK (PIN_DMASK_EN(GPIOA_PIN0) | \
|
||||
PIN_DMASK_EN(GPIOA_PIN1) | \
|
||||
PIN_DMASK_EN(GPIOA_PIN2) | \
|
||||
PIN_DMASK_EN(GPIOA_PIN3) | \
|
||||
PIN_DMASK_EN(GPIOA_PIN4) | \
|
||||
PIN_DMASK_EN(GPIOA_PIN5) | \
|
||||
PIN_DMASK_EN(GPIOA_PIN6) | \
|
||||
PIN_DMASK_EN(GPIOA_PIN7) | \
|
||||
PIN_DMASK_EN(GPIOA_PIN8) | \
|
||||
PIN_DMASK_EN(GPIOA_PIN9) | \
|
||||
PIN_DMASK_EN(GPIOA_SPI1_MISO0) | \
|
||||
PIN_DMASK_EN(GPIOA_SPI1_CLK) | \
|
||||
PIN_DMASK_EN(GPIOA_PWM0) | \
|
||||
PIN_DMASK_EN(GPIOA_PWM1) | \
|
||||
PIN_DMASK_EN(GPIOA_PWM2) | \
|
||||
PIN_DMASK_EN(GPIOA_PWM3))
|
||||
#define VAL_GPIOA_DBEN (PIN_DBNCE_EN(GPIOA_PIN0) | \
|
||||
PIN_DBNCE_EN(GPIOA_PIN1) | \
|
||||
PIN_DBNCE_EN(GPIOA_PIN2) | \
|
||||
PIN_DBNCE_EN(GPIOA_PIN3) | \
|
||||
PIN_DBNCE_EN(GPIOA_PIN4) | \
|
||||
PIN_DBNCE_EN(GPIOA_PIN5) | \
|
||||
PIN_DBNCE_EN(GPIOA_PIN6) | \
|
||||
PIN_DBNCE_EN(GPIOA_PIN7) | \
|
||||
PIN_DBNCE_EN(GPIOA_PIN8) | \
|
||||
PIN_DBNCE_EN(GPIOA_PIN9) | \
|
||||
PIN_DBNCE_EN(GPIOA_SPI1_MISO0) | \
|
||||
PIN_DBNCE_EN(GPIOA_SPI1_CLK) | \
|
||||
PIN_DBNCE_EN(GPIOA_PWM0) | \
|
||||
PIN_DBNCE_EN(GPIOA_PWM1) | \
|
||||
PIN_DBNCE_EN(GPIOA_PWM2) | \
|
||||
PIN_DBNCE_EN(GPIOA_PWM3))
|
||||
#define VAL_GPIOA_IMD (PIN_IMD_EDGE(GPIOA_PIN0) | \
|
||||
PIN_IMD_EDGE(GPIOA_PIN1) | \
|
||||
PIN_IMD_EDGE(GPIOA_PIN2) | \
|
||||
PIN_IMD_EDGE(GPIOA_PIN3) | \
|
||||
PIN_IMD_EDGE(GPIOA_PIN4) | \
|
||||
PIN_IMD_EDGE(GPIOA_PIN5) | \
|
||||
PIN_IMD_EDGE(GPIOA_PIN6) | \
|
||||
PIN_IMD_EDGE(GPIOA_PIN7) | \
|
||||
PIN_IMD_EDGE(GPIOA_PIN8) | \
|
||||
PIN_IMD_EDGE(GPIOA_PIN9) | \
|
||||
PIN_IMD_EDGE(GPIOA_SPI1_MISO0) | \
|
||||
PIN_IMD_EDGE(GPIOA_SPI1_CLK) | \
|
||||
PIN_IMD_EDGE(GPIOA_PWM0) | \
|
||||
PIN_IMD_EDGE(GPIOA_PWM1) | \
|
||||
PIN_IMD_EDGE(GPIOA_PWM2) | \
|
||||
PIN_IMD_EDGE(GPIOA_PWM3))
|
||||
#define VAL_GPIOA_IEN (PIN_IEN_FELL_DIS(GPIOA_PIN0) | \
|
||||
PIN_IEN_FELL_DIS(GPIOA_PIN1) | \
|
||||
PIN_IEN_FELL_DIS(GPIOA_PIN2) | \
|
||||
PIN_IEN_FELL_DIS(GPIOA_PIN3) | \
|
||||
PIN_IEN_FELL_DIS(GPIOA_PIN4) | \
|
||||
PIN_IEN_FELL_DIS(GPIOA_PIN5) | \
|
||||
PIN_IEN_FELL_DIS(GPIOA_PIN6) | \
|
||||
PIN_IEN_FELL_DIS(GPIOA_PIN7) | \
|
||||
PIN_IEN_FELL_DIS(GPIOA_PIN8) | \
|
||||
PIN_IEN_FELL_DIS(GPIOA_PIN9) | \
|
||||
PIN_IEN_FELL_DIS(GPIOA_SPI1_MISO0) | \
|
||||
PIN_IEN_FELL_DIS(GPIOA_SPI1_CLK) | \
|
||||
PIN_IEN_FELL_DIS(GPIOA_PWM0) | \
|
||||
PIN_IEN_FELL_DIS(GPIOA_PWM1) | \
|
||||
PIN_IEN_FELL_DIS(GPIOA_PWM2) | \
|
||||
PIN_IEN_FELL_DIS(GPIOA_PWM3))
|
||||
#define VAL_GPIOA_ISRC (PIN_ISRC_DIS(GPIOA_PIN0) | \
|
||||
PIN_ISRC_DIS(GPIOA_PIN1) | \
|
||||
PIN_ISRC_DIS(GPIOA_PIN2) | \
|
||||
PIN_ISRC_DIS(GPIOA_PIN3) | \
|
||||
PIN_ISRC_DIS(GPIOA_PIN4) | \
|
||||
PIN_ISRC_DIS(GPIOA_PIN5) | \
|
||||
PIN_ISRC_DIS(GPIOA_PIN6) | \
|
||||
PIN_ISRC_DIS(GPIOA_PIN7) | \
|
||||
PIN_ISRC_DIS(GPIOA_PIN8) | \
|
||||
PIN_ISRC_DIS(GPIOA_PIN9) | \
|
||||
PIN_ISRC_DIS(GPIOA_SPI1_MISO0) | \
|
||||
PIN_ISRC_DIS(GPIOA_SPI1_CLK) | \
|
||||
PIN_ISRC_DIS(GPIOA_PWM0) | \
|
||||
PIN_ISRC_DIS(GPIOA_PWM1) | \
|
||||
PIN_ISRC_DIS(GPIOA_PWM2) | \
|
||||
PIN_ISRC_DIS(GPIOA_PWM3))
|
||||
#define VAL_GPIOA_DOUT (PIN_DATA_LOW(GPIOA_PIN0) | \
|
||||
PIN_DATA_LOW(GPIOA_PIN1) | \
|
||||
PIN_DATA_LOW(GPIOA_PIN2) | \
|
||||
PIN_DATA_LOW(GPIOA_PIN3) | \
|
||||
PIN_DATA_LOW(GPIOA_PIN4) | \
|
||||
PIN_DATA_LOW(GPIOA_PIN5) | \
|
||||
PIN_DATA_LOW(GPIOA_PIN6) | \
|
||||
PIN_DATA_LOW(GPIOA_PIN7) | \
|
||||
PIN_DATA_LOW(GPIOA_PIN8) | \
|
||||
PIN_DATA_LOW(GPIOA_PIN9) | \
|
||||
PIN_DATA_LOW(GPIOA_SPI1_MISO0) | \
|
||||
PIN_DATA_LOW(GPIOA_SPI1_CLK) | \
|
||||
PIN_DATA_LOW(GPIOA_PWM0) | \
|
||||
PIN_DATA_LOW(GPIOA_PWM1) | \
|
||||
PIN_DATA_LOW(GPIOA_PWM2) | \
|
||||
PIN_DATA_LOW(GPIOA_PWM3))
|
||||
|
||||
/*
|
||||
* GPIOB setup:
|
||||
*
|
||||
* PB0 - UART0_RXD (input pullup).
|
||||
* PB1 - UART0_TXD (output).
|
||||
* PB2 - UART0_RTS (output).
|
||||
* PB3 - UART0_CTS (output).
|
||||
* PB4 - UART1_RXD (output).
|
||||
* PB5 - UART1_TXD (output).
|
||||
* PB6 - UART1_RTS (output).
|
||||
* PB7 - UART1_CTS (output).
|
||||
* PB8 - TM0 (input pullup).
|
||||
* PB9 - TM1 (input pullup).
|
||||
* PB10 - TM2 (input pullup).
|
||||
* PB11 - PIN11 (input pullup).
|
||||
* PB12 - CLK0 (output).
|
||||
* PB13 - PIN13 (output).
|
||||
* PB14 - INT0 (debug output).
|
||||
* PB15 - INT1 (input pullup).
|
||||
*/
|
||||
#define VAL_GPIOB_PMD (PIN_MODE_INPUT(GPIOB_UART0_RXD) | \
|
||||
PIN_MODE_OUTPUT(GPIOB_UART0_TXD) | \
|
||||
PIN_MODE_OUTPUT(GPIOB_UART0_RTS) | \
|
||||
PIN_MODE_OUTPUT(GPIOB_UART0_CTS) | \
|
||||
PIN_MODE_OUTPUT(GPIOB_UART1_RXD) | \
|
||||
PIN_MODE_OUTPUT(GPIOB_UART1_TXD) | \
|
||||
PIN_MODE_OUTPUT(GPIOB_UART1_RTS) | \
|
||||
PIN_MODE_OUTPUT(GPIOB_UART1_CTS) | \
|
||||
PIN_MODE_INPUT(GPIOB_TM0) | \
|
||||
PIN_MODE_INPUT(GPIOB_TM1) | \
|
||||
PIN_MODE_INPUT(GPIOB_TM2) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN11) | \
|
||||
PIN_MODE_OUTPUT(GPIOB_CLK0) | \
|
||||
PIN_MODE_OUTPUT(GPIOB_PIN13) | \
|
||||
PIN_MODE_OUTPUT(GPIOB_INT0) | \
|
||||
PIN_MODE_INPUT(GPIOB_INT1))
|
||||
#define VAL_GPIOB_OFFD (PIN_DIGITAL_EN(GPIOB_UART0_RXD) | \
|
||||
PIN_DIGITAL_DIS(GPIOB_UART0_TXD) | \
|
||||
PIN_DIGITAL_DIS(GPIOB_UART0_RTS) | \
|
||||
PIN_DIGITAL_DIS(GPIOB_UART0_CTS) | \
|
||||
PIN_DIGITAL_DIS(GPIOB_UART1_RXD) | \
|
||||
PIN_DIGITAL_DIS(GPIOB_UART1_TXD) | \
|
||||
PIN_DIGITAL_DIS(GPIOB_UART1_RTS) | \
|
||||
PIN_DIGITAL_DIS(GPIOB_UART1_CTS) | \
|
||||
PIN_DIGITAL_DIS(GPIOB_TM0) | \
|
||||
PIN_DIGITAL_EN(GPIOB_TM1) | \
|
||||
PIN_DIGITAL_EN(GPIOB_TM2) | \
|
||||
PIN_DIGITAL_EN(GPIOB_PIN11) | \
|
||||
PIN_DIGITAL_DIS(GPIOB_CLK0) | \
|
||||
PIN_DIGITAL_DIS(GPIOB_PIN13) | \
|
||||
PIN_DIGITAL_DIS(GPIOB_INT0) | \
|
||||
PIN_DIGITAL_EN(GPIOB_INT1))
|
||||
#define VAL_GPIOB_DMASK (PIN_DMASK_EN(GPIOB_UART0_RXD) | \
|
||||
PIN_DMASK_DIS(GPIOB_UART0_TXD) | \
|
||||
PIN_DMASK_DIS(GPIOB_UART0_RTS) | \
|
||||
PIN_DMASK_DIS(GPIOB_UART0_CTS) | \
|
||||
PIN_DMASK_DIS(GPIOB_UART1_RXD) | \
|
||||
PIN_DMASK_DIS(GPIOB_UART1_TXD) | \
|
||||
PIN_DMASK_DIS(GPIOB_UART1_RTS) | \
|
||||
PIN_DMASK_DIS(GPIOB_UART1_CTS) | \
|
||||
PIN_DMASK_EN(GPIOB_TM0) | \
|
||||
PIN_DMASK_EN(GPIOB_TM1) | \
|
||||
PIN_DMASK_EN(GPIOB_TM2) | \
|
||||
PIN_DMASK_EN(GPIOB_PIN11) | \
|
||||
PIN_DMASK_DIS(GPIOB_CLK0) | \
|
||||
PIN_DMASK_DIS(GPIOB_PIN13) | \
|
||||
PIN_DMASK_DIS(GPIOB_INT0) | \
|
||||
PIN_DMASK_EN(GPIOB_INT1))
|
||||
#define VAL_GPIOB_DBEN (PIN_DBNCE_EN(GPIOB_UART0_RXD) | \
|
||||
PIN_DBNCE_DIS(GPIOB_UART0_TXD) | \
|
||||
PIN_DBNCE_DIS(GPIOB_UART0_RTS) | \
|
||||
PIN_DBNCE_DIS(GPIOB_UART0_CTS) | \
|
||||
PIN_DBNCE_DIS(GPIOB_UART1_RXD) | \
|
||||
PIN_DBNCE_DIS(GPIOB_UART1_TXD) | \
|
||||
PIN_DBNCE_DIS(GPIOB_UART1_RTS) | \
|
||||
PIN_DBNCE_DIS(GPIOB_UART1_CTS) | \
|
||||
PIN_DBNCE_EN(GPIOB_TM0) | \
|
||||
PIN_DBNCE_EN(GPIOB_TM1) | \
|
||||
PIN_DBNCE_EN(GPIOB_TM2) | \
|
||||
PIN_DBNCE_EN(GPIOB_PIN11) | \
|
||||
PIN_DBNCE_DIS(GPIOB_CLK0) | \
|
||||
PIN_DBNCE_DIS(GPIOB_PIN13) | \
|
||||
PIN_DBNCE_DIS(GPIOB_INT0) | \
|
||||
PIN_DBNCE_EN(GPIOB_INT1))
|
||||
#define VAL_GPIOB_IMD (PIN_IMD_EDGE(GPIOB_UART0_RXD) | \
|
||||
PIN_IMD_EDGE(GPIOB_UART0_TXD) | \
|
||||
PIN_IMD_EDGE(GPIOB_UART0_RTS) | \
|
||||
PIN_IMD_EDGE(GPIOB_UART0_CTS) | \
|
||||
PIN_IMD_EDGE(GPIOB_UART1_RXD) | \
|
||||
PIN_IMD_EDGE(GPIOB_UART1_TXD) | \
|
||||
PIN_IMD_EDGE(GPIOB_UART1_RTS) | \
|
||||
PIN_IMD_EDGE(GPIOB_UART1_CTS) | \
|
||||
PIN_IMD_EDGE(GPIOB_TM0) | \
|
||||
PIN_IMD_EDGE(GPIOB_TM1) | \
|
||||
PIN_IMD_EDGE(GPIOB_TM2) | \
|
||||
PIN_IMD_EDGE(GPIOB_PIN11) | \
|
||||
PIN_IMD_EDGE(GPIOB_CLK0) | \
|
||||
PIN_IMD_EDGE(GPIOB_PIN13) | \
|
||||
PIN_IMD_EDGE(GPIOB_INT0) | \
|
||||
PIN_IMD_EDGE(GPIOB_INT1))
|
||||
#define VAL_GPIOB_IEN (PIN_IEN_FELL_DIS(GPIOB_UART0_RXD) | \
|
||||
PIN_IEN_FELL_DIS(GPIOB_UART0_TXD) | \
|
||||
PIN_IEN_FELL_DIS(GPIOB_UART0_RTS) | \
|
||||
PIN_IEN_FELL_DIS(GPIOB_UART0_CTS) | \
|
||||
PIN_IEN_FELL_DIS(GPIOB_UART1_RXD) | \
|
||||
PIN_IEN_FELL_DIS(GPIOB_UART1_TXD) | \
|
||||
PIN_IEN_FELL_DIS(GPIOB_UART1_RTS) | \
|
||||
PIN_IEN_FELL_DIS(GPIOB_UART1_CTS) | \
|
||||
PIN_IEN_FELL_DIS(GPIOB_TM0) | \
|
||||
PIN_IEN_FELL_DIS(GPIOB_TM1) | \
|
||||
PIN_IEN_FELL_DIS(GPIOB_TM2) | \
|
||||
PIN_IEN_FELL_DIS(GPIOB_PIN11) | \
|
||||
PIN_IEN_FELL_DIS(GPIOB_CLK0) | \
|
||||
PIN_IEN_FELL_DIS(GPIOB_PIN13) | \
|
||||
PIN_IEN_FELL_DIS(GPIOB_INT0) | \
|
||||
PIN_IEN_FELL_DIS(GPIOB_INT1))
|
||||
#define VAL_GPIOB_ISRC (PIN_ISRC_DIS(GPIOB_UART0_RXD) | \
|
||||
PIN_ISRC_DIS(GPIOB_UART0_TXD) | \
|
||||
PIN_ISRC_DIS(GPIOB_UART0_RTS) | \
|
||||
PIN_ISRC_DIS(GPIOB_UART0_CTS) | \
|
||||
PIN_ISRC_DIS(GPIOB_UART1_RXD) | \
|
||||
PIN_ISRC_DIS(GPIOB_UART1_TXD) | \
|
||||
PIN_ISRC_DIS(GPIOB_UART1_RTS) | \
|
||||
PIN_ISRC_DIS(GPIOB_UART1_CTS) | \
|
||||
PIN_ISRC_DIS(GPIOB_TM0) | \
|
||||
PIN_ISRC_DIS(GPIOB_TM1) | \
|
||||
PIN_ISRC_DIS(GPIOB_TM2) | \
|
||||
PIN_ISRC_DIS(GPIOB_PIN11) | \
|
||||
PIN_ISRC_DIS(GPIOB_CLK0) | \
|
||||
PIN_ISRC_DIS(GPIOB_PIN13) | \
|
||||
PIN_ISRC_DIS(GPIOB_INT0) | \
|
||||
PIN_ISRC_DIS(GPIOB_INT1))
|
||||
#define VAL_GPIOB_DOUT (PIN_DATA_LOW(GPIOB_UART0_RXD) | \
|
||||
PIN_DATA_LOW(GPIOB_UART0_TXD) | \
|
||||
PIN_DATA_LOW(GPIOB_UART0_RTS) | \
|
||||
PIN_DATA_LOW(GPIOB_UART0_CTS) | \
|
||||
PIN_DATA_LOW(GPIOB_UART1_RXD) | \
|
||||
PIN_DATA_LOW(GPIOB_UART1_TXD) | \
|
||||
PIN_DATA_LOW(GPIOB_UART1_RTS) | \
|
||||
PIN_DATA_LOW(GPIOB_UART1_CTS) | \
|
||||
PIN_DATA_LOW(GPIOB_TM0) | \
|
||||
PIN_DATA_LOW(GPIOB_TM1) | \
|
||||
PIN_DATA_LOW(GPIOB_TM2) | \
|
||||
PIN_DATA_LOW(GPIOB_PIN11) | \
|
||||
PIN_DATA_LOW(GPIOB_CLK0) | \
|
||||
PIN_DATA_LOW(GPIOB_PIN13) | \
|
||||
PIN_DATA_LOW(GPIOB_INT0) | \
|
||||
PIN_DATA_LOW(GPIOB_INT1))
|
||||
|
||||
/*
|
||||
* GPIOC setup:
|
||||
*
|
||||
* PC0 - PIN0 (input pullup).
|
||||
* PC1 - PIN1 (input pullup).
|
||||
* PC2 - PIN2 (input pullup).
|
||||
* PC3 - PIN3 (input pullup).
|
||||
* PC4 - PIN4 (output).
|
||||
* PC5 - PIN5 (output).
|
||||
* PC6 - PIN6 (input pullup).
|
||||
* PC7 - PIN7 (input pullup).
|
||||
* PC8 - PIN8 (input pullup).
|
||||
* PC9 - PIN9 (input pullup).
|
||||
* PC10 - PIN10 (input pullup).
|
||||
* PC11 - PIN11 (input pullup).
|
||||
* PC12 - PIN12 (input pullup).
|
||||
* PC13 - PIN13 (input pullup).
|
||||
* PC14 - PIN14 (input pullup).
|
||||
* PC15 - PIN15 (input pullup).
|
||||
*/
|
||||
#define VAL_GPIOC_PMD (PIN_MODE_INPUT(GPIOC_PIN0) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN1) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN2) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN3) | \
|
||||
PIN_MODE_OUTPUT(GPIOC_PIN4) | \
|
||||
PIN_MODE_OUTPUT(GPIOC_PIN5) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN6) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN7) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN8) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN9) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN10) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN11) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN12) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN13) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN14) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_OFFD (PIN_DIGITAL_EN(GPIOC_PIN0) | \
|
||||
PIN_DIGITAL_EN(GPIOC_PIN1) | \
|
||||
PIN_DIGITAL_EN(GPIOC_PIN2) | \
|
||||
PIN_DIGITAL_EN(GPIOC_PIN3) | \
|
||||
PIN_DIGITAL_DIS(GPIOC_PIN4) | \
|
||||
PIN_DIGITAL_DIS(GPIOC_PIN5) | \
|
||||
PIN_DIGITAL_EN(GPIOC_PIN6) | \
|
||||
PIN_DIGITAL_EN(GPIOC_PIN7) | \
|
||||
PIN_DIGITAL_EN(GPIOC_PIN8) | \
|
||||
PIN_DIGITAL_EN(GPIOC_PIN9) | \
|
||||
PIN_DIGITAL_EN(GPIOC_PIN10) | \
|
||||
PIN_DIGITAL_EN(GPIOC_PIN11) | \
|
||||
PIN_DIGITAL_EN(GPIOC_PIN12) | \
|
||||
PIN_DIGITAL_EN(GPIOC_PIN13) | \
|
||||
PIN_DIGITAL_EN(GPIOC_PIN14) | \
|
||||
PIN_DIGITAL_EN(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_DMASK (PIN_DMASK_EN(GPIOC_PIN0) | \
|
||||
PIN_DMASK_EN(GPIOC_PIN1) | \
|
||||
PIN_DMASK_EN(GPIOC_PIN2) | \
|
||||
PIN_DMASK_EN(GPIOC_PIN3) | \
|
||||
PIN_DMASK_DIS(GPIOC_PIN4) | \
|
||||
PIN_DMASK_DIS(GPIOC_PIN5) | \
|
||||
PIN_DMASK_EN(GPIOC_PIN6) | \
|
||||
PIN_DMASK_EN(GPIOC_PIN7) | \
|
||||
PIN_DMASK_EN(GPIOC_PIN8) | \
|
||||
PIN_DMASK_EN(GPIOC_PIN9) | \
|
||||
PIN_DMASK_EN(GPIOC_PIN10) | \
|
||||
PIN_DMASK_EN(GPIOC_PIN11) | \
|
||||
PIN_DMASK_EN(GPIOC_PIN12) | \
|
||||
PIN_DMASK_EN(GPIOC_PIN13) | \
|
||||
PIN_DMASK_EN(GPIOC_PIN14) | \
|
||||
PIN_DMASK_EN(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_DBEN (PIN_DBNCE_EN(GPIOC_PIN0) | \
|
||||
PIN_DBNCE_EN(GPIOC_PIN1) | \
|
||||
PIN_DBNCE_EN(GPIOC_PIN2) | \
|
||||
PIN_DBNCE_EN(GPIOC_PIN3) | \
|
||||
PIN_DBNCE_DIS(GPIOC_PIN4) | \
|
||||
PIN_DBNCE_DIS(GPIOC_PIN5) | \
|
||||
PIN_DBNCE_EN(GPIOC_PIN6) | \
|
||||
PIN_DBNCE_EN(GPIOC_PIN7) | \
|
||||
PIN_DBNCE_EN(GPIOC_PIN8) | \
|
||||
PIN_DBNCE_EN(GPIOC_PIN9) | \
|
||||
PIN_DBNCE_EN(GPIOC_PIN10) | \
|
||||
PIN_DBNCE_EN(GPIOC_PIN11) | \
|
||||
PIN_DBNCE_EN(GPIOC_PIN12) | \
|
||||
PIN_DBNCE_EN(GPIOC_PIN13) | \
|
||||
PIN_DBNCE_EN(GPIOC_PIN14) | \
|
||||
PIN_DBNCE_EN(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_IMD (PIN_IMD_EDGE(GPIOC_PIN0) | \
|
||||
PIN_IMD_EDGE(GPIOC_PIN1) | \
|
||||
PIN_IMD_EDGE(GPIOC_PIN2) | \
|
||||
PIN_IMD_EDGE(GPIOC_PIN3) | \
|
||||
PIN_IMD_EDGE(GPIOC_PIN4) | \
|
||||
PIN_IMD_EDGE(GPIOC_PIN5) | \
|
||||
PIN_IMD_EDGE(GPIOC_PIN6) | \
|
||||
PIN_IMD_EDGE(GPIOC_PIN7) | \
|
||||
PIN_IMD_EDGE(GPIOC_PIN8) | \
|
||||
PIN_IMD_EDGE(GPIOC_PIN9) | \
|
||||
PIN_IMD_EDGE(GPIOC_PIN10) | \
|
||||
PIN_IMD_EDGE(GPIOC_PIN11) | \
|
||||
PIN_IMD_EDGE(GPIOC_PIN12) | \
|
||||
PIN_IMD_EDGE(GPIOC_PIN13) | \
|
||||
PIN_IMD_EDGE(GPIOC_PIN14) | \
|
||||
PIN_IMD_EDGE(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_IEN (PIN_IEN_FELL_DIS(GPIOC_PIN0) | \
|
||||
PIN_IEN_FELL_DIS(GPIOC_PIN1) | \
|
||||
PIN_IEN_FELL_DIS(GPIOC_PIN2) | \
|
||||
PIN_IEN_FELL_DIS(GPIOC_PIN3) | \
|
||||
PIN_IEN_FELL_DIS(GPIOC_PIN4) | \
|
||||
PIN_IEN_FELL_DIS(GPIOC_PIN5) | \
|
||||
PIN_IEN_FELL_DIS(GPIOC_PIN6) | \
|
||||
PIN_IEN_FELL_DIS(GPIOC_PIN7) | \
|
||||
PIN_IEN_FELL_DIS(GPIOC_PIN8) | \
|
||||
PIN_IEN_FELL_DIS(GPIOC_PIN9) | \
|
||||
PIN_IEN_FELL_DIS(GPIOC_PIN10) | \
|
||||
PIN_IEN_FELL_DIS(GPIOC_PIN11) | \
|
||||
PIN_IEN_FELL_DIS(GPIOC_PIN12) | \
|
||||
PIN_IEN_FELL_DIS(GPIOC_PIN13) | \
|
||||
PIN_IEN_FELL_DIS(GPIOC_PIN14) | \
|
||||
PIN_IEN_FELL_DIS(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_ISRC (PIN_ISRC_DIS(GPIOC_PIN0) | \
|
||||
PIN_ISRC_DIS(GPIOC_PIN1) | \
|
||||
PIN_ISRC_DIS(GPIOC_PIN2) | \
|
||||
PIN_ISRC_DIS(GPIOC_PIN3) | \
|
||||
PIN_ISRC_DIS(GPIOC_PIN4) | \
|
||||
PIN_ISRC_DIS(GPIOC_PIN5) | \
|
||||
PIN_ISRC_DIS(GPIOC_PIN6) | \
|
||||
PIN_ISRC_DIS(GPIOC_PIN7) | \
|
||||
PIN_ISRC_DIS(GPIOC_PIN8) | \
|
||||
PIN_ISRC_DIS(GPIOC_PIN9) | \
|
||||
PIN_ISRC_DIS(GPIOC_PIN10) | \
|
||||
PIN_ISRC_DIS(GPIOC_PIN11) | \
|
||||
PIN_ISRC_DIS(GPIOC_PIN12) | \
|
||||
PIN_ISRC_DIS(GPIOC_PIN13) | \
|
||||
PIN_ISRC_DIS(GPIOC_PIN14) | \
|
||||
PIN_ISRC_DIS(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_DOUT (PIN_DATA_LOW(GPIOC_PIN0) | \
|
||||
PIN_DATA_LOW(GPIOC_PIN1) | \
|
||||
PIN_DATA_LOW(GPIOC_PIN2) | \
|
||||
PIN_DATA_LOW(GPIOC_PIN3) | \
|
||||
PIN_DATA_LOW(GPIOC_PIN4) | \
|
||||
PIN_DATA_LOW(GPIOC_PIN5) | \
|
||||
PIN_DATA_LOW(GPIOC_PIN6) | \
|
||||
PIN_DATA_LOW(GPIOC_PIN7) | \
|
||||
PIN_DATA_LOW(GPIOC_PIN8) | \
|
||||
PIN_DATA_LOW(GPIOC_PIN9) | \
|
||||
PIN_DATA_LOW(GPIOC_PIN10) | \
|
||||
PIN_DATA_LOW(GPIOC_PIN11) | \
|
||||
PIN_DATA_LOW(GPIOC_PIN12) | \
|
||||
PIN_DATA_LOW(GPIOC_PIN13) | \
|
||||
PIN_DATA_LOW(GPIOC_PIN14) | \
|
||||
PIN_DATA_LOW(GPIOC_PIN15))
|
||||
|
||||
/*
|
||||
* GPIOD setup:
|
||||
*
|
||||
* PD0 - ADC0 (input pullup).
|
||||
* PD1 - ADC1 (input pullup).
|
||||
* PD2 - ADC2 (input pullup).
|
||||
* PD3 - ADC3 (output).
|
||||
* PD4 - ADC4 (output).
|
||||
* PD5 - ADC5 (output).
|
||||
* PD6 - PIN6 (input pullup).
|
||||
* PD7 - PIN7 (input pullup).
|
||||
* PD8 - PIN8 (input pullup).
|
||||
* PD9 - PIN9 (output).
|
||||
* PD10 - PIN10 (debug output).
|
||||
* PD11 - PIN11 (output).
|
||||
* PD12 - PIN12 (input pullup).
|
||||
* PD13 - PIN13 (input pullup).
|
||||
* PD14 - PIN14 (input pullup).
|
||||
* PD15 - PIN15 (input pullup).
|
||||
*/
|
||||
#define VAL_GPIOD_PMD (PIN_MODE_INPUT(GPIOD_ADC0) | \
|
||||
PIN_MODE_INPUT(GPIOD_ADC1) | \
|
||||
PIN_MODE_INPUT(GPIOD_ADC2) | \
|
||||
PIN_MODE_OUTPUT(GPIOD_ADC3) | \
|
||||
PIN_MODE_OUTPUT(GPIOD_ADC4) | \
|
||||
PIN_MODE_OUTPUT(GPIOD_ADC5) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN6) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN7) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN8) | \
|
||||
PIN_MODE_OUTPUT(GPIOD_PIN9) | \
|
||||
PIN_MODE_OUTPUT(GPIOD_PIN10) | \
|
||||
PIN_MODE_OUTPUT(GPIOD_PIN11) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN12) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN13) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN14) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN15))
|
||||
#define VAL_GPIOD_OFFD (PIN_DIGITAL_EN(GPIOD_ADC0) | \
|
||||
PIN_DIGITAL_EN(GPIOD_ADC1) | \
|
||||
PIN_DIGITAL_EN(GPIOD_ADC2) | \
|
||||
PIN_DIGITAL_DIS(GPIOD_ADC3) | \
|
||||
PIN_DIGITAL_DIS(GPIOD_ADC4) | \
|
||||
PIN_DIGITAL_DIS(GPIOD_ADC5) | \
|
||||
PIN_DIGITAL_EN(GPIOD_PIN6) | \
|
||||
PIN_DIGITAL_EN(GPIOD_PIN7) | \
|
||||
PIN_DIGITAL_EN(GPIOD_PIN8) | \
|
||||
PIN_DIGITAL_DIS(GPIOD_PIN9) | \
|
||||
PIN_DIGITAL_DIS(GPIOD_PIN10) | \
|
||||
PIN_DIGITAL_DIS(GPIOD_PIN11) | \
|
||||
PIN_DIGITAL_EN(GPIOD_PIN12) | \
|
||||
PIN_DIGITAL_EN(GPIOD_PIN13) | \
|
||||
PIN_DIGITAL_EN(GPIOD_PIN14) | \
|
||||
PIN_DIGITAL_EN(GPIOD_PIN15))
|
||||
#define VAL_GPIOD_DMASK (PIN_DMASK_EN(GPIOD_ADC0) | \
|
||||
PIN_DMASK_EN(GPIOD_ADC1) | \
|
||||
PIN_DMASK_EN(GPIOD_ADC2) | \
|
||||
PIN_DMASK_DIS(GPIOD_ADC3) | \
|
||||
PIN_DMASK_DIS(GPIOD_ADC4) | \
|
||||
PIN_DMASK_DIS(GPIOD_ADC5) | \
|
||||
PIN_DMASK_EN(GPIOD_PIN6) | \
|
||||
PIN_DMASK_EN(GPIOD_PIN7) | \
|
||||
PIN_DMASK_EN(GPIOD_PIN8) | \
|
||||
PIN_DMASK_DIS(GPIOD_PIN9) | \
|
||||
PIN_DMASK_DIS(GPIOD_PIN10) | \
|
||||
PIN_DMASK_DIS(GPIOD_PIN11) | \
|
||||
PIN_DMASK_EN(GPIOD_PIN12) | \
|
||||
PIN_DMASK_EN(GPIOD_PIN13) | \
|
||||
PIN_DMASK_EN(GPIOD_PIN14) | \
|
||||
PIN_DMASK_EN(GPIOD_PIN15))
|
||||
#define VAL_GPIOD_DBEN (PIN_DBNCE_EN(GPIOD_ADC0) | \
|
||||
PIN_DBNCE_EN(GPIOD_ADC1) | \
|
||||
PIN_DBNCE_EN(GPIOD_ADC2) | \
|
||||
PIN_DBNCE_DIS(GPIOD_ADC3) | \
|
||||
PIN_DBNCE_DIS(GPIOD_ADC4) | \
|
||||
PIN_DBNCE_DIS(GPIOD_ADC5) | \
|
||||
PIN_DBNCE_EN(GPIOD_PIN6) | \
|
||||
PIN_DBNCE_EN(GPIOD_PIN7) | \
|
||||
PIN_DBNCE_EN(GPIOD_PIN8) | \
|
||||
PIN_DBNCE_DIS(GPIOD_PIN9) | \
|
||||
PIN_DBNCE_DIS(GPIOD_PIN10) | \
|
||||
PIN_DBNCE_DIS(GPIOD_PIN11) | \
|
||||
PIN_DBNCE_EN(GPIOD_PIN12) | \
|
||||
PIN_DBNCE_EN(GPIOD_PIN13) | \
|
||||
PIN_DBNCE_EN(GPIOD_PIN14) | \
|
||||
PIN_DBNCE_EN(GPIOD_PIN15))
|
||||
#define VAL_GPIOD_IMD (PIN_IMD_EDGE(GPIOD_ADC0) | \
|
||||
PIN_IMD_EDGE(GPIOD_ADC1) | \
|
||||
PIN_IMD_EDGE(GPIOD_ADC2) | \
|
||||
PIN_IMD_EDGE(GPIOD_ADC3) | \
|
||||
PIN_IMD_EDGE(GPIOD_ADC4) | \
|
||||
PIN_IMD_EDGE(GPIOD_ADC5) | \
|
||||
PIN_IMD_EDGE(GPIOD_PIN6) | \
|
||||
PIN_IMD_EDGE(GPIOD_PIN7) | \
|
||||
PIN_IMD_EDGE(GPIOD_PIN8) | \
|
||||
PIN_IMD_EDGE(GPIOD_PIN9) | \
|
||||
PIN_IMD_EDGE(GPIOD_PIN10) | \
|
||||
PIN_IMD_EDGE(GPIOD_PIN11) | \
|
||||
PIN_IMD_EDGE(GPIOD_PIN12) | \
|
||||
PIN_IMD_EDGE(GPIOD_PIN13) | \
|
||||
PIN_IMD_EDGE(GPIOD_PIN14) | \
|
||||
PIN_IMD_EDGE(GPIOD_PIN15))
|
||||
#define VAL_GPIOD_IEN (PIN_IEN_FELL_DIS(GPIOD_ADC0) | \
|
||||
PIN_IEN_FELL_DIS(GPIOD_ADC1) | \
|
||||
PIN_IEN_FELL_DIS(GPIOD_ADC2) | \
|
||||
PIN_IEN_FELL_DIS(GPIOD_ADC3) | \
|
||||
PIN_IEN_FELL_DIS(GPIOD_ADC4) | \
|
||||
PIN_IEN_FELL_DIS(GPIOD_ADC5) | \
|
||||
PIN_IEN_FELL_DIS(GPIOD_PIN6) | \
|
||||
PIN_IEN_FELL_DIS(GPIOD_PIN7) | \
|
||||
PIN_IEN_FELL_DIS(GPIOD_PIN8) | \
|
||||
PIN_IEN_FELL_DIS(GPIOD_PIN9) | \
|
||||
PIN_IEN_FELL_DIS(GPIOD_PIN10) | \
|
||||
PIN_IEN_FELL_DIS(GPIOD_PIN11) | \
|
||||
PIN_IEN_FELL_DIS(GPIOD_PIN12) | \
|
||||
PIN_IEN_FELL_DIS(GPIOD_PIN13) | \
|
||||
PIN_IEN_FELL_DIS(GPIOD_PIN14) | \
|
||||
PIN_IEN_FELL_DIS(GPIOD_PIN15))
|
||||
#define VAL_GPIOD_ISRC (PIN_ISRC_DIS(GPIOD_ADC0) | \
|
||||
PIN_ISRC_DIS(GPIOD_ADC1) | \
|
||||
PIN_ISRC_DIS(GPIOD_ADC2) | \
|
||||
PIN_ISRC_DIS(GPIOD_ADC3) | \
|
||||
PIN_ISRC_DIS(GPIOD_ADC4) | \
|
||||
PIN_ISRC_DIS(GPIOD_ADC5) | \
|
||||
PIN_ISRC_DIS(GPIOD_PIN6) | \
|
||||
PIN_ISRC_DIS(GPIOD_PIN7) | \
|
||||
PIN_ISRC_DIS(GPIOD_PIN8) | \
|
||||
PIN_ISRC_DIS(GPIOD_PIN9) | \
|
||||
PIN_ISRC_DIS(GPIOD_PIN10) | \
|
||||
PIN_ISRC_DIS(GPIOD_PIN11) | \
|
||||
PIN_ISRC_DIS(GPIOD_PIN12) | \
|
||||
PIN_ISRC_DIS(GPIOD_PIN13) | \
|
||||
PIN_ISRC_DIS(GPIOD_PIN14) | \
|
||||
PIN_ISRC_DIS(GPIOD_PIN15))
|
||||
#define VAL_GPIOD_DOUT (PIN_DATA_LOW(GPIOD_ADC0) | \
|
||||
PIN_DATA_LOW(GPIOD_ADC1) | \
|
||||
PIN_DATA_LOW(GPIOD_ADC2) | \
|
||||
PIN_DATA_LOW(GPIOD_ADC3) | \
|
||||
PIN_DATA_LOW(GPIOD_ADC4) | \
|
||||
PIN_DATA_LOW(GPIOD_ADC5) | \
|
||||
PIN_DATA_LOW(GPIOD_PIN6) | \
|
||||
PIN_DATA_LOW(GPIOD_PIN7) | \
|
||||
PIN_DATA_LOW(GPIOD_PIN8) | \
|
||||
PIN_DATA_LOW(GPIOD_PIN9) | \
|
||||
PIN_DATA_LOW(GPIOD_PIN10) | \
|
||||
PIN_DATA_LOW(GPIOD_PIN11) | \
|
||||
PIN_DATA_LOW(GPIOD_PIN12) | \
|
||||
PIN_DATA_LOW(GPIOD_PIN13) | \
|
||||
PIN_DATA_LOW(GPIOD_PIN14) | \
|
||||
PIN_DATA_LOW(GPIOD_PIN15))
|
||||
|
||||
/*
|
||||
* GPIOF setup:
|
||||
*
|
||||
* PF0 - OSC_IN (input floating).
|
||||
* PF1 - OSC_OUT (input floating).
|
||||
* PF2 - I2C0_SDA (input pullup).
|
||||
* PF3 - I2C0_SCL (input pullup).
|
||||
* PF4 - PIN4 (input pullup).
|
||||
* PF5 - PIN5 (input pullup).
|
||||
* PF6 - PIN6 (input pullup).
|
||||
* PF7 - PIN7 (input pullup).
|
||||
* PF8 - PIN8 (input pullup).
|
||||
* PF9 - PIN9 (input pullup).
|
||||
* PF10 - PIN10 (input pullup).
|
||||
* PF11 - PIN11 (input pullup).
|
||||
* PF12 - PIN12 (input pullup).
|
||||
* PF13 - PIN13 (input pullup).
|
||||
* PF14 - PIN14 (input pullup).
|
||||
* PF15 - PIN15 (input pullup).
|
||||
*/
|
||||
#define VAL_GPIOF_PMD (PIN_MODE_QUASI(GPIOF_OSC_IN) | \
|
||||
PIN_MODE_QUASI(GPIOF_OSC_OUT) | \
|
||||
PIN_MODE_INPUT(GPIOF_I2C0_SDA) | \
|
||||
PIN_MODE_INPUT(GPIOF_I2C0_SCL) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN4) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN5) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN6) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN7) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN8) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN9) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN10) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN11) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN12) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN13) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN14) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_OFFD (PIN_DIGITAL_DIS(GPIOF_OSC_IN) | \
|
||||
PIN_DIGITAL_DIS(GPIOF_OSC_OUT) | \
|
||||
PIN_DIGITAL_EN(GPIOF_I2C0_SDA) | \
|
||||
PIN_DIGITAL_EN(GPIOF_I2C0_SCL) | \
|
||||
PIN_DIGITAL_EN(GPIOF_PIN4) | \
|
||||
PIN_DIGITAL_EN(GPIOF_PIN5) | \
|
||||
PIN_DIGITAL_EN(GPIOF_PIN6) | \
|
||||
PIN_DIGITAL_EN(GPIOF_PIN7) | \
|
||||
PIN_DIGITAL_EN(GPIOF_PIN8) | \
|
||||
PIN_DIGITAL_EN(GPIOF_PIN9) | \
|
||||
PIN_DIGITAL_EN(GPIOF_PIN10) | \
|
||||
PIN_DIGITAL_EN(GPIOF_PIN11) | \
|
||||
PIN_DIGITAL_EN(GPIOF_PIN12) | \
|
||||
PIN_DIGITAL_EN(GPIOF_PIN13) | \
|
||||
PIN_DIGITAL_EN(GPIOF_PIN14) | \
|
||||
PIN_DIGITAL_EN(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_DMASK (PIN_DMASK_DIS(GPIOF_OSC_IN) | \
|
||||
PIN_DMASK_DIS(GPIOF_OSC_OUT) | \
|
||||
PIN_DMASK_EN(GPIOF_I2C0_SDA) | \
|
||||
PIN_DMASK_EN(GPIOF_I2C0_SCL) | \
|
||||
PIN_DMASK_EN(GPIOF_PIN4) | \
|
||||
PIN_DMASK_EN(GPIOF_PIN5) | \
|
||||
PIN_DMASK_EN(GPIOF_PIN6) | \
|
||||
PIN_DMASK_EN(GPIOF_PIN7) | \
|
||||
PIN_DMASK_EN(GPIOF_PIN8) | \
|
||||
PIN_DMASK_EN(GPIOF_PIN9) | \
|
||||
PIN_DMASK_EN(GPIOF_PIN10) | \
|
||||
PIN_DMASK_EN(GPIOF_PIN11) | \
|
||||
PIN_DMASK_EN(GPIOF_PIN12) | \
|
||||
PIN_DMASK_EN(GPIOF_PIN13) | \
|
||||
PIN_DMASK_EN(GPIOF_PIN14) | \
|
||||
PIN_DMASK_EN(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_DBEN (PIN_DBNCE_DIS(GPIOF_OSC_IN) | \
|
||||
PIN_DBNCE_DIS(GPIOF_OSC_OUT) | \
|
||||
PIN_DBNCE_EN(GPIOF_I2C0_SDA) | \
|
||||
PIN_DBNCE_EN(GPIOF_I2C0_SCL) | \
|
||||
PIN_DBNCE_EN(GPIOF_PIN4) | \
|
||||
PIN_DBNCE_EN(GPIOF_PIN5) | \
|
||||
PIN_DBNCE_EN(GPIOF_PIN6) | \
|
||||
PIN_DBNCE_EN(GPIOF_PIN7) | \
|
||||
PIN_DBNCE_EN(GPIOF_PIN8) | \
|
||||
PIN_DBNCE_EN(GPIOF_PIN9) | \
|
||||
PIN_DBNCE_EN(GPIOF_PIN10) | \
|
||||
PIN_DBNCE_EN(GPIOF_PIN11) | \
|
||||
PIN_DBNCE_EN(GPIOF_PIN12) | \
|
||||
PIN_DBNCE_EN(GPIOF_PIN13) | \
|
||||
PIN_DBNCE_EN(GPIOF_PIN14) | \
|
||||
PIN_DBNCE_EN(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_IMD (PIN_IMD_LVL(GPIOF_OSC_IN) | \
|
||||
PIN_IMD_LVL(GPIOF_OSC_OUT) | \
|
||||
PIN_IMD_EDGE(GPIOF_I2C0_SDA) | \
|
||||
PIN_IMD_EDGE(GPIOF_I2C0_SCL) | \
|
||||
PIN_IMD_EDGE(GPIOF_PIN4) | \
|
||||
PIN_IMD_EDGE(GPIOF_PIN5) | \
|
||||
PIN_IMD_EDGE(GPIOF_PIN6) | \
|
||||
PIN_IMD_EDGE(GPIOF_PIN7) | \
|
||||
PIN_IMD_EDGE(GPIOF_PIN8) | \
|
||||
PIN_IMD_EDGE(GPIOF_PIN9) | \
|
||||
PIN_IMD_EDGE(GPIOF_PIN10) | \
|
||||
PIN_IMD_EDGE(GPIOF_PIN11) | \
|
||||
PIN_IMD_EDGE(GPIOF_PIN12) | \
|
||||
PIN_IMD_EDGE(GPIOF_PIN13) | \
|
||||
PIN_IMD_EDGE(GPIOF_PIN14) | \
|
||||
PIN_IMD_EDGE(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_IEN (PIN_IEN_FELL_DIS(GPIOF_OSC_IN) | \
|
||||
PIN_IEN_FELL_DIS(GPIOF_OSC_OUT) | \
|
||||
PIN_IEN_FELL_DIS(GPIOF_I2C0_SDA) | \
|
||||
PIN_IEN_FELL_DIS(GPIOF_I2C0_SCL) | \
|
||||
PIN_IEN_FELL_DIS(GPIOF_PIN4) | \
|
||||
PIN_IEN_FELL_DIS(GPIOF_PIN5) | \
|
||||
PIN_IEN_FELL_DIS(GPIOF_PIN6) | \
|
||||
PIN_IEN_FELL_DIS(GPIOF_PIN7) | \
|
||||
PIN_IEN_FELL_DIS(GPIOF_PIN8) | \
|
||||
PIN_IEN_FELL_DIS(GPIOF_PIN9) | \
|
||||
PIN_IEN_FELL_DIS(GPIOF_PIN10) | \
|
||||
PIN_IEN_FELL_DIS(GPIOF_PIN11) | \
|
||||
PIN_IEN_FELL_DIS(GPIOF_PIN12) | \
|
||||
PIN_IEN_FELL_DIS(GPIOF_PIN13) | \
|
||||
PIN_IEN_FELL_DIS(GPIOF_PIN14) | \
|
||||
PIN_IEN_FELL_DIS(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_ISRC (PIN_ISRC_DIS(GPIOF_OSC_IN) | \
|
||||
PIN_ISRC_DIS(GPIOF_OSC_OUT) | \
|
||||
PIN_ISRC_DIS(GPIOF_I2C0_SDA) | \
|
||||
PIN_ISRC_DIS(GPIOF_I2C0_SCL) | \
|
||||
PIN_ISRC_DIS(GPIOF_PIN4) | \
|
||||
PIN_ISRC_DIS(GPIOF_PIN5) | \
|
||||
PIN_ISRC_DIS(GPIOF_PIN6) | \
|
||||
PIN_ISRC_DIS(GPIOF_PIN7) | \
|
||||
PIN_ISRC_DIS(GPIOF_PIN8) | \
|
||||
PIN_ISRC_DIS(GPIOF_PIN9) | \
|
||||
PIN_ISRC_DIS(GPIOF_PIN10) | \
|
||||
PIN_ISRC_DIS(GPIOF_PIN11) | \
|
||||
PIN_ISRC_DIS(GPIOF_PIN12) | \
|
||||
PIN_ISRC_DIS(GPIOF_PIN13) | \
|
||||
PIN_ISRC_DIS(GPIOF_PIN14) | \
|
||||
PIN_ISRC_DIS(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_DOUT (PIN_DATA_LOW(GPIOF_OSC_IN) | \
|
||||
PIN_DATA_LOW(GPIOF_OSC_OUT) | \
|
||||
PIN_DATA_LOW(GPIOF_I2C0_SDA) | \
|
||||
PIN_DATA_LOW(GPIOF_I2C0_SCL) | \
|
||||
PIN_DATA_LOW(GPIOF_PIN4) | \
|
||||
PIN_DATA_LOW(GPIOF_PIN5) | \
|
||||
PIN_DATA_LOW(GPIOF_PIN6) | \
|
||||
PIN_DATA_LOW(GPIOF_PIN7) | \
|
||||
PIN_DATA_LOW(GPIOF_PIN8) | \
|
||||
PIN_DATA_LOW(GPIOF_PIN9) | \
|
||||
PIN_DATA_LOW(GPIOF_PIN10) | \
|
||||
PIN_DATA_LOW(GPIOF_PIN11) | \
|
||||
PIN_DATA_LOW(GPIOF_PIN12) | \
|
||||
PIN_DATA_LOW(GPIOF_PIN13) | \
|
||||
PIN_DATA_LOW(GPIOF_PIN14) | \
|
||||
PIN_DATA_LOW(GPIOF_PIN15))
|
||||
|
||||
|
||||
#if !defined(_FROM_ASM_)
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void boardInit(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* _FROM_ASM_ */
|
||||
|
||||
#endif /* BOARD_H */
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
# List of all the board related files.
|
||||
BOARDSRC = $(BOARD_PATH)/boards/NUC123SD4AN0/board.c
|
||||
|
||||
# Required include directories
|
||||
BOARDINC = $(BOARD_PATH)/boards/NUC123SD4AN0
|
||||
|
|
@ -0,0 +1,23 @@
|
|||
/* Copyright 2020 QMK
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#define CH_CFG_ST_FREQUENCY 10000
|
||||
#define CH_CFG_ST_TIMEDELTA 0
|
||||
#define CH_CFG_USE_WAITEXIT TRUE
|
||||
|
||||
#include_next <chconf.h>
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
/*
|
||||
Copyright 2019 /u/KeepItUnder
|
||||
|
||||
This program is free software: you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation, either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "config_common.h"
|
||||
|
||||
/* USB Device descriptor parameter */
|
||||
#define VENDOR_ID 0x445B
|
||||
#define PRODUCT_ID 0x07AF
|
||||
#define DEVICE_VER 0x0001
|
||||
#define MANUFACTURER Ducky
|
||||
#define PRODUCT One2sf
|
||||
|
||||
/* key matrix size */
|
||||
#define MATRIX_ROWS 5
|
||||
#define MATRIX_COLS 16
|
||||
|
||||
/*
|
||||
* Keyboard Matrix Assignments
|
||||
*
|
||||
* Change this to how you wired your keyboard
|
||||
* COLS: AVR pins used for columns, left to right
|
||||
* ROWS: AVR pins used for rows, top to bottom
|
||||
* DIODE_DIRECTION: COL2ROW = COL = Anode (+), ROW = Cathode (-, marked on diode)
|
||||
* ROW2COL = ROW = Anode (+), COL = Cathode (-, marked on diode)
|
||||
*
|
||||
*/
|
||||
#define MATRIX_ROW_PINS { D11, B4, B5, B6, B7 }
|
||||
#define MATRIX_COL_PINS { B10, B9, C13, C12, C11, C10, C9, C8, A15, A14, A13, D0, D1, D2,B15,B8 }
|
||||
#define DIP_SWITCH_MATRIX_GRID { {0,14}, {1,14}, {2,14}, {3,14} }
|
||||
#define UNUSED_PINS
|
||||
|
||||
/* COL2ROW, ROW2COL*/
|
||||
#define DIODE_DIRECTION COL2ROW
|
||||
|
||||
/* Debounce reduces chatter (unintended double-presses) - set 0 if debouncing is not needed */
|
||||
#define DEBOUNCE 5
|
||||
|
||||
#define FORCE_NKRO
|
||||
|
||||
#define GPIO_INPUT_PIN_DELAY (NUC123_HCLK / 6 / 1000000L)
|
||||
|
|
@ -0,0 +1,82 @@
|
|||
{
|
||||
"keyboard_name": "Ducky One 2 SF",
|
||||
"layouts": {
|
||||
"LAYOUT_all": {
|
||||
"layout": [
|
||||
{ "x": 0, "y": 0, "w": 1, "label": "ESC" },
|
||||
{ "x": 1, "y": 0, "w": 1, "label": "1" },
|
||||
{ "x": 2, "y": 0, "w": 1, "label": "2" },
|
||||
{ "x": 3, "y": 0, "w": 1, "label": "3" },
|
||||
{ "x": 4, "y": 0, "w": 1, "label": "4" },
|
||||
{ "x": 5, "y": 0, "w": 1, "label": "5" },
|
||||
{ "x": 6, "y": 0, "w": 1, "label": "6" },
|
||||
{ "x": 7, "y": 0, "w": 1, "label": "7" },
|
||||
{ "x": 8, "y": 0, "w": 1, "label": "8" },
|
||||
{ "x": 9, "y": 0, "w": 1, "label": "9" },
|
||||
{ "x": 10, "y": 0, "w": 1, "label": "0" },
|
||||
{ "x": 11, "y": 0, "w": 1, "label": "DASH" },
|
||||
{ "x": 12, "y": 0, "w": 1, "label": "EQUALSIGN" },
|
||||
{ "x": 13, "y": 0, "w": 2, "label": "BACKSPACE" },
|
||||
{ "x": 15.25, "y": 0, "w": 2, "label": "DEL" },
|
||||
|
||||
{ "x": 0, "y": 1, "w": 1.5, "label": "TAB" },
|
||||
{ "x": 1.5, "y": 1, "w": 1, "label": "Q" },
|
||||
{ "x": 2.5, "y": 1, "w": 1, "label": "W" },
|
||||
{ "x": 3.5, "y": 1, "w": 1, "label": "E" },
|
||||
{ "x": 4.5, "y": 1, "w": 1, "label": "R" },
|
||||
{ "x": 5.5, "y": 1, "w": 1, "label": "T" },
|
||||
{ "x": 6.5, "y": 1, "w": 1, "label": "Y" },
|
||||
{ "x": 7.5, "y": 1, "w": 1, "label": "U" },
|
||||
{ "x": 8.5, "y": 1, "w": 1, "label": "I" },
|
||||
{ "x": 9.5, "y": 1, "w": 1, "label": "O" },
|
||||
{ "x": 10.5, "y": 1, "w": 1, "label": "P" },
|
||||
{ "x": 11.5, "y": 1, "w": 1, "label": "LBRACKET" },
|
||||
{ "x": 12.5, "y": 1, "w": 1, "label": "RBRACKET" },
|
||||
{ "x": 13.5, "y": 1, "w": 1.5, "label": "BACKSLASH" },
|
||||
{ "x": 15.25, "y": 1, "w": 1.5, "label": "PAGEUP" },
|
||||
|
||||
{ "x": 0, "y": 2, "w": 1.75, "label": "CAPSLOCK" },
|
||||
{ "x": 1.75, "y": 2, "w": 1, "label": "A" },
|
||||
{ "x": 2.75, "y": 2, "w": 1, "label": "S" },
|
||||
{ "x": 3.75, "y": 2, "w": 1, "label": "D" },
|
||||
{ "x": 4.75, "y": 2, "w": 1, "label": "F" },
|
||||
{ "x": 5.75, "y": 2, "w": 1, "label": "G" },
|
||||
{ "x": 6.75, "y": 2, "w": 1, "label": "H" },
|
||||
{ "x": 7.75, "y": 2, "w": 1, "label": "J" },
|
||||
{ "x": 8.75, "y": 2, "w": 1, "label": "K" },
|
||||
{ "x": 9.75, "y": 2, "w": 1, "label": "L" },
|
||||
{ "x": 10.75, "y": 2, "w": 1, "label": "SEMICOLON" },
|
||||
{ "x": 11.75, "y": 2, "w": 1, "label": "QUOTE" },
|
||||
{ "x": 12.75, "y": 2, "w": 1, "label": "ISOHASH" },
|
||||
{ "x": 13.75, "y": 2, "w": 1.25, "label": "ENTER" },
|
||||
{ "x": 15.25, "y": 2, "w": 1.25, "label": "PAGEDOWN" },
|
||||
|
||||
{ "x": 0, "y": 3, "w": 1.25, "label": "LSHIFT" },
|
||||
{ "x": 1.25, "y": 3, "w": 1, "label": "ISOBACKSLASH" },
|
||||
{ "x": 2.25, "y": 3, "w": 1, "label": "Z" },
|
||||
{ "x": 3.25, "y": 3, "w": 1, "label": "X" },
|
||||
{ "x": 4.25, "y": 3, "w": 1, "label": "C" },
|
||||
{ "x": 5.25, "y": 3, "w": 1, "label": "V" },
|
||||
{ "x": 6.25, "y": 3, "w": 1, "label": "B" },
|
||||
{ "x": 7.25, "y": 3, "w": 1, "label": "N" },
|
||||
{ "x": 8.25, "y": 3, "w": 1, "label": "M" },
|
||||
{ "x": 9.25, "y": 3, "w": 1, "label": "COMMA" },
|
||||
{ "x": 10.25, "y": 3, "w": 1, "label": "PERIOD" },
|
||||
{ "x": 11.25, "y": 3, "w": 1, "label": "SLASH" },
|
||||
{ "x": 12.25, "y": 3, "w": 2.75, "label": "RSHIFT" },
|
||||
{ "x": 14.25, "y": 3, "w": 2.75, "label": "UP" },
|
||||
|
||||
{ "x": 0, "y": 4, "w": 1.25, "label": "LCTRL" },
|
||||
{ "x": 1.25, "y": 4, "w": 1.25, "label": "LCMD" },
|
||||
{ "x": 2.5, "y": 4, "w": 1.25, "label": "LALT" },
|
||||
{ "x": 3.75, "y": 4, "w": 6.25, "label": "SPACE" },
|
||||
{ "x": 10, "y": 4, "w": 1, "label": "RALT" },
|
||||
{ "x": 11, "y": 4, "w": 1, "label": "FN" },
|
||||
{ "x": 12, "y": 4, "w": 1.25, "label": "RCTRL" },
|
||||
{ "x": 13.25, "y": 4, "w": 1, "label": "LEFT" },
|
||||
{ "x": 14.25, "y": 4, "w": 1, "label": "DOWN" }
|
||||
{ "x": 15.25, "y": 4, "w": 1, "label": "RIGHT" }
|
||||
]
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,51 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2020 Alex Lewontin
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _MCUCONF_H_
|
||||
#define _MCUCONF_H_
|
||||
|
||||
/*
|
||||
* Board setting
|
||||
* The following settings override the default settings present in
|
||||
* the various device driver implementation headers.
|
||||
* Note that the settings for each driver only have effect if the whole
|
||||
* driver is enabled in halconf.h.
|
||||
*
|
||||
* IRQ priorities:
|
||||
* 3...0 Lowest...Highest.
|
||||
*
|
||||
* DMA priorities:
|
||||
* 5...0 Lowest...Highest.
|
||||
*/
|
||||
|
||||
/*
|
||||
* HAL driver system settings.
|
||||
*/
|
||||
#define NUC123_HSE_ENABLED TRUE
|
||||
#define NUC123_PLL_ENABLED TRUE
|
||||
#define NUC123_PLLSRC NUC123_PLLSRC_HSE
|
||||
#define NUC123_HCLKSRC NUC123_HCLKSRC_PLL
|
||||
#define NUC123_HCLKDIV 2
|
||||
#define NUC123_PLL_NF 144
|
||||
#define NUC123_USB_USE_USB0 TRUE
|
||||
#define NUC123_USB_USE_USB1 TRUE
|
||||
|
||||
#define NUC123_SERIAL_USE_UART0 TRUE
|
||||
#define NUC123_SERIAL_CLKSRC NUC123_SERIAL_CLKSRC_HSI
|
||||
|
||||
#define NUC123_MCUCONF
|
||||
|
||||
#endif /* _MCUCONF_H_ */
|
||||
|
|
@ -0,0 +1 @@
|
|||
# One2SF
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
MCU_FAMILY = NUMICRO
|
||||
MCU_SERIES = NUC123
|
||||
|
||||
# Bootloader selection
|
||||
BOOTLOADER = custom
|
||||
|
||||
# linker script to use
|
||||
MCU_LDSCRIPT = NUC123xD4xx0
|
||||
|
||||
# startup code to use
|
||||
MCU_STARTUP = NUC123
|
||||
BOARD = NUC123SD4AN0
|
||||
|
||||
# NUC123 series is Cortex M0
|
||||
MCU = cortex-m0
|
||||
# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
|
||||
ARMV = 6
|
||||
|
||||
# Build Options
|
||||
# change yes to no to disable
|
||||
#
|
||||
BOOTMAGIC_ENABLE = yes # Enable Bootmagic Lite
|
||||
MOUSEKEY_ENABLE = yes # Mouse keys
|
||||
EXTRAKEY_ENABLE = yes # Audio control and System control
|
||||
CONSOLE_ENABLE = no # Console for debug
|
||||
COMMAND_ENABLE = no # Commands for debug and configuration
|
||||
NKRO_ENABLE = yes # Enable N-Key Rollover
|
||||
BACKLIGHT_ENABLE = no # Enable keyboard backlight functionality
|
||||
RGBLIGHT_ENABLE = no # Enable keyboard RGB underglow
|
||||
AUDIO_ENABLE = no # Audio output
|
||||
DIP_SWITCH_ENABLE = yes
|
||||
|
||||
# Enter lower-power sleep mode when on the ChibiOS idle thread
|
||||
OPT_DEFS += -DCORTEX_ENABLE_WFI_IDLE=TRUE
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
/* Copyright 2019 /u/KeepItUnder
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
// place overrides here
|
||||
#define GRAVE_ESC_GUI_OVERRIDE
|
||||
#define MK_3_SPEED
|
||||
#define MK_C_OFFSET_UNMOD 400 /* Cursor offset per movement (unmodified) */
|
||||
#define MK_C_INTERVAL_UNMOD 5 /* Time between cursor movements (unmodified) */
|
||||
#define MK_W_OFFSET_UNMOD 100 /* Scroll steps per scroll action (unmodified) */
|
||||
#define MK_W_INTERVAL_UNMOD 10 /* Time between scroll steps (unmodified) */
|
||||
|
|
@ -0,0 +1,55 @@
|
|||
/* Copyright 2019 /u/KeepItUnder
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#include QMK_KEYBOARD_H
|
||||
|
||||
// LAYERS
|
||||
enum Layer {
|
||||
_QWERTY = 0, // Standard QWERTY layer
|
||||
_FUNCTION, // Function key layer
|
||||
_COLOUR // RGB key layer
|
||||
};
|
||||
#define _QW _QWERTY
|
||||
#define _FN _FUNCTION
|
||||
#define _CLR _COLOUR
|
||||
|
||||
const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
|
||||
|
||||
[_QWERTY] = LAYOUT_all(
|
||||
// 2 3 4 5 6 7 8 9 10 11 12 13 14 15
|
||||
KC_GESC, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS, KC_EQL, KC_BSPC, KC_DEL,
|
||||
KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC, KC_RBRC, KC_BSLS, KC_PGUP,
|
||||
KC_CAPS, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, KC_NUHS, KC_ENT, KC_PGDN,
|
||||
KC_LSFT, KC_NUBS, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_RSFT, KC_UP,
|
||||
KC_LCTL, KC_LGUI, KC_LALT, KC_SPC, KC_RALT,MO(1) , KC_RCTL, KC_LEFT, KC_DOWN, KC_RGHT
|
||||
),
|
||||
|
||||
[_FUNCTION] = LAYOUT_all(
|
||||
KC_GRV, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_DEL, KC_DEL,
|
||||
_______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, KC_PGUP,
|
||||
_______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, KC_ENT, KC_PGDN,
|
||||
_______, _______, RGB_TOG, RGB_MOD, RGB_HUI, RGB_HUD, RGB_SAI, RGB_SAD, KC_MUTE, KC_VOLD, KC_VOLU, MO(2), _______, KC_PGUP,
|
||||
_______, _______, _______, _______, _______, _______, _______, KC_HOME, KC_PGDN, KC_END
|
||||
),
|
||||
|
||||
[_COLOUR] = LAYOUT_all(
|
||||
_______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______,
|
||||
_______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______,
|
||||
_______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______,
|
||||
_______, _______, RGB_TOG, RGB_MOD, RGB_HUI, RGB_HUD, RGB_SAI, RGB_SAD, _______, _______, _______, _______, _______, _______,
|
||||
_______, _______, _______, _______, _______, _______, _______, _______, _______, _______
|
||||
),
|
||||
|
||||
};
|
||||
|
|
@ -0,0 +1 @@
|
|||
# The default keymap for one2sf
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
# One2SF
|
||||
|
||||
A 65% keyboard by Ducky
|
||||
|
||||
* Hardware Supported: Ducky One 2 SF RGB / NUC123SD4AN0 / MBI5043GP
|
||||
* Layout only support for ANSI (ISO & VIA still WIP)
|
||||
Make example for this keyboard (after setting up your build environment):
|
||||
|
||||
make ducky/one2sf:default
|
||||
|
||||
See the [build environment setup](https://docs.qmk.fm/#/getting_started_build_tools) and the [make instructions](https://docs.qmk.fm/#/getting_started_make_guide) for more information. Brand new to QMK? Start with our [Complete Newbs Guide](https://docs.qmk.fm/#/newbs).
|
||||
|
||||
RGB LEDs are currently disabled until the driver is merged.
|
||||
|
||||
This firmware was tested on the duckyon2sf 1967ST version. To enter the 1967ST bootloader to flash you can boot the keyboard while holding D+L.
|
||||
|
||||
There are then two ways to flash the keyboard:
|
||||
|
||||
pip install --user nuvoton-isp
|
||||
nuvoisp -f ducky_one2sf_ansi.bin
|
||||
|
||||
Alternatively you can use elfmimi's [nu-isp-cli](https://lib.rs/crates/nu-isp-cli) which is more complete than nuvoisp and allows flashing .hex files as well.
|
||||
|
||||
cargo install nu-isp-cli
|
||||
nu-isp-cli flash ducky_one2sf_ansi.bin
|
||||
|
|
@ -0,0 +1 @@
|
|||
DEFAULT_FOLDER = ducky/one2sf/1967st
|
||||
Loading…
Reference in New Issue