[Keyboard] Fix matrix issues with Promethium (#13648)
Drashna Jaelre
GitHub
parent
bf57c552c9
commit
21e0a9780d
|
|
@ -31,12 +31,15 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|||
|
||||
/* key matrix size */
|
||||
#define MATRIX_COLS 6
|
||||
#define MATRIX_ROWS 3
|
||||
#define MATRIX_ROWS 9
|
||||
|
||||
/* default pin-out */
|
||||
#define MATRIX_COL_PINS { F4, F1, F0, D6, D0, D1 }
|
||||
#define MATRIX_ROW_PINS { F5, F6, F7 }
|
||||
#define TRACKPOINT_PINS { B7, B6, D7 }
|
||||
#define MATRIX_COL_PINS \
|
||||
{ F4, F1, F0, D6, D0, D1 }
|
||||
#define MATRIX_ROW_PINS \
|
||||
{ F5, F6, F7, NO_PIN, NO_PIN, NO_PIN, NO_PIN, NO_PIN, NO_PIN }
|
||||
#define TRACKPOINT_PINS \
|
||||
{ B7, B6, D7 }
|
||||
#define UNUSED_PINS
|
||||
|
||||
/*
|
||||
|
|
@ -48,7 +51,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|||
* DIODE_DIRECTION: COL2ROW = COL = Anode (+), ROW = Cathode (-, marked on diode)
|
||||
* ROW2COL = ROW = Anode (+), COL = Cathode (-, marked on diode)
|
||||
*
|
||||
*/
|
||||
*/
|
||||
#define DIODE_DIRECTION COL2ROW
|
||||
|
||||
// #define BACKLIGHT_PIN B7
|
||||
|
|
@ -90,9 +93,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|||
//#define FORCE_NKRO
|
||||
|
||||
/* key combination for command */
|
||||
#define IS_COMMAND() ( \
|
||||
get_mods() == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT) | MOD_BIT(KC_LCTRL) | MOD_BIT(KC_RCTRL)) \
|
||||
)
|
||||
#define IS_COMMAND() (get_mods() == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT) | MOD_BIT(KC_LCTRL) | MOD_BIT(KC_RCTRL)))
|
||||
|
||||
/* control how magic key switches layers */
|
||||
//#define MAGIC_KEY_SWITCH_LAYER_WITH_FKEYS true
|
||||
|
|
@ -240,8 +241,8 @@ enum led_sequence {
|
|||
LED_TOTAL
|
||||
};
|
||||
|
||||
#define RGB_DI_PIN B5
|
||||
#define RGBSPS_NUM LED_TOTAL
|
||||
# define RGB_DI_PIN B5
|
||||
# define RGBSPS_NUM LED_TOTAL
|
||||
#endif
|
||||
|
||||
/* PS/2 mouse */
|
||||
|
|
@ -259,68 +260,68 @@ enum led_sequence {
|
|||
/* PS/2 mouse interrupt version */
|
||||
#ifdef PS2_USE_INT
|
||||
/* uses INT1 for clock line(ATMega32U4) */
|
||||
#define PS2_CLOCK_PORT PORTD
|
||||
#define PS2_CLOCK_PIN PIND
|
||||
#define PS2_CLOCK_DDR DDRD
|
||||
#define PS2_CLOCK_BIT 3
|
||||
#define PS2_DATA_PORT PORTD
|
||||
#define PS2_DATA_PIN PIND
|
||||
#define PS2_DATA_DDR DDRD
|
||||
#define PS2_DATA_BIT 2
|
||||
# define PS2_CLOCK_PORT PORTD
|
||||
# define PS2_CLOCK_PIN PIND
|
||||
# define PS2_CLOCK_DDR DDRD
|
||||
# define PS2_CLOCK_BIT 3
|
||||
# define PS2_DATA_PORT PORTD
|
||||
# define PS2_DATA_PIN PIND
|
||||
# define PS2_DATA_DDR DDRD
|
||||
# define PS2_DATA_BIT 2
|
||||
|
||||
#define PS2_INT_INIT() do { \
|
||||
EICRA |= ((1<<ISC31) | \
|
||||
(0<<ISC30)); \
|
||||
} while (0)
|
||||
#define PS2_INT_ON() do { \
|
||||
EIMSK |= (1<<INT3); \
|
||||
} while (0)
|
||||
#define PS2_INT_OFF() do { \
|
||||
EIMSK &= ~(1<<INT3); \
|
||||
} while (0)
|
||||
#define PS2_INT_VECT INT3_vect
|
||||
# define PS2_INT_INIT() \
|
||||
do { \
|
||||
EICRA |= ((1 << ISC31) | (0 << ISC30)); \
|
||||
} while (0)
|
||||
# define PS2_INT_ON() \
|
||||
do { \
|
||||
EIMSK |= (1 << INT3); \
|
||||
} while (0)
|
||||
# define PS2_INT_OFF() \
|
||||
do { \
|
||||
EIMSK &= ~(1 << INT3); \
|
||||
} while (0)
|
||||
# define PS2_INT_VECT INT3_vect
|
||||
#endif
|
||||
|
||||
/* PS/2 mouse USART version */
|
||||
#ifdef PS2_USE_USART
|
||||
/* XCK for clock line and RXD for data line */
|
||||
#define PS2_CLOCK_PORT PORTD
|
||||
#define PS2_CLOCK_PIN PIND
|
||||
#define PS2_CLOCK_DDR DDRD
|
||||
#define PS2_CLOCK_BIT 5
|
||||
#define PS2_DATA_PORT PORTD
|
||||
#define PS2_DATA_PIN PIND
|
||||
#define PS2_DATA_DDR DDRD
|
||||
#define PS2_DATA_BIT 2
|
||||
# define PS2_CLOCK_PORT PORTD
|
||||
# define PS2_CLOCK_PIN PIND
|
||||
# define PS2_CLOCK_DDR DDRD
|
||||
# define PS2_CLOCK_BIT 5
|
||||
# define PS2_DATA_PORT PORTD
|
||||
# define PS2_DATA_PIN PIND
|
||||
# define PS2_DATA_DDR DDRD
|
||||
# define PS2_DATA_BIT 2
|
||||
|
||||
/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
|
||||
/* set DDR of CLOCK as input to be slave */
|
||||
#define PS2_USART_INIT() do { \
|
||||
PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \
|
||||
PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \
|
||||
UCSR1C = ((1 << UMSEL10) | \
|
||||
(3 << UPM10) | \
|
||||
(0 << USBS1) | \
|
||||
(3 << UCSZ10) | \
|
||||
(0 << UCPOL1)); \
|
||||
# define PS2_USART_INIT() \
|
||||
do { \
|
||||
PS2_CLOCK_DDR &= ~(1 << PS2_CLOCK_BIT); \
|
||||
PS2_DATA_DDR &= ~(1 << PS2_DATA_BIT); \
|
||||
UCSR1C = ((1 << UMSEL10) | (3 << UPM10) | (0 << USBS1) | (3 << UCSZ10) | (0 << UCPOL1)); \
|
||||
UCSR1A = 0; \
|
||||
UBRR1H = 0; \
|
||||
UBRR1L = 0; \
|
||||
} while (0)
|
||||
#define PS2_USART_RX_INT_ON() do { \
|
||||
UCSR1B = ((1 << RXCIE1) | \
|
||||
(1 << RXEN1)); \
|
||||
} while (0)
|
||||
#define PS2_USART_RX_POLL_ON() do { \
|
||||
} while (0)
|
||||
# define PS2_USART_RX_INT_ON() \
|
||||
do { \
|
||||
UCSR1B = ((1 << RXCIE1) | (1 << RXEN1)); \
|
||||
} while (0)
|
||||
# define PS2_USART_RX_POLL_ON() \
|
||||
do { \
|
||||
UCSR1B = (1 << RXEN1); \
|
||||
} while (0)
|
||||
#define PS2_USART_OFF() do { \
|
||||
} while (0)
|
||||
# define PS2_USART_OFF() \
|
||||
do { \
|
||||
UCSR1C = 0; \
|
||||
UCSR1B &= ~((1 << RXEN1) | \
|
||||
(1 << TXEN1)); \
|
||||
} while (0)
|
||||
#define PS2_USART_RX_READY (UCSR1A & (1<<RXC1))
|
||||
#define PS2_USART_RX_DATA UDR1
|
||||
#define PS2_USART_ERROR (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1)))
|
||||
#define PS2_USART_RX_VECT USART1_RX_vect
|
||||
UCSR1B &= ~((1 << RXEN1) | (1 << TXEN1)); \
|
||||
} while (0)
|
||||
# define PS2_USART_RX_READY (UCSR1A & (1 << RXC1))
|
||||
# define PS2_USART_RX_DATA UDR1
|
||||
# define PS2_USART_ERROR (UCSR1A & ((1 << FE1) | (1 << DOR1) | (1 << UPE1)))
|
||||
# define PS2_USART_RX_VECT USART1_RX_vect
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue