Add HT32 support to core (#14388)

* tmk_core: temporary fix to allow HT32 based keyboards to work without patched ChibiOS-contrib (AnnePro2)

* HT32: add spi support

Add persistent led support with eeprom (#9)

* adding HT32 support to chibios SPI master driver

update spi driver, fix bad merging with master

* HT32: fix formatting

HT32: Fix formatting: tmk_core/protocol/chibios/usb_main.c

Co-authored-by: Drashna Jaelre <drashna@live.com>

* HT32: Apply suggestions from fauxpark's code review

Co-authored-by: Ryan <fauxpark@gmail.com>

* HT32: update spi driver

* ht32: apply code review suggestions, remove old workaround

Co-authored-by: tech2077 <tech2077@gmail.com>
Co-authored-by: Drashna Jaelre <drashna@live.com>
Co-authored-by: Ryan <fauxpark@gmail.com>
master
bwisn 2021-10-18 07:17:29 +02:00 committed by GitHub
parent 1a63b24548
commit 7e3ff206b8
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 34 additions and 1 deletions

View File

@ -110,6 +110,31 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) {
spiConfig.tar0 |= SPIx_CTARn_BR(8);
break;
}
#elif defined(HT32)
spiConfig.cr0 = SPI_CR0_SELOEN;
spiConfig.cr1 = SPI_CR1_MODE | 8; // 8 bits and in master mode
if (lsbFirst) {
spiConfig.cr1 |= SPI_CR1_FIRSTBIT;
}
switch (mode) {
case 0:
spiConfig.cr1 |= SPI_CR1_FORMAT_MODE0;
break;
case 1:
spiConfig.cr1 |= SPI_CR1_FORMAT_MODE1;
break;
case 2:
spiConfig.cr1 |= SPI_CR1_FORMAT_MODE2;
break;
case 3:
spiConfig.cr1 |= SPI_CR1_FORMAT_MODE3;
break;
}
spiConfig.cpr = (roundedDivisor - 1) >> 1;
#else
spiConfig.cr1 = 0;

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@ -48,4 +48,12 @@
# define USE_I2CV1_CONTRIB // for some reason a bunch of ChibiOS-Contrib boards only have clock_speed
# define USE_GPIOV1
# endif
#endif
#endif
#if defined(HT32)
# define CPU_CLOCK HT32_CK_SYS_FREQUENCY
# define PAL_MODE_ALTERNATE PAL_HT32_MODE_AF
# define PAL_OUTPUT_TYPE_OPENDRAIN (PAL_HT32_MODE_OD | PAL_HT32_MODE_DIR)
# define PAL_OUTPUT_TYPE_PUSHPULL PAL_HT32_MODE_DIR
# define PAL_OUTPUT_SPEED_HIGHEST 0
#endif