2020-12-19 19:43:00 +01:00
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/* Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com>
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* Copyright 2019 Sunjun Kim
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* Copyright 2020 Ploopy Corporation
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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2021-08-21 06:14:23 +02:00
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#include "pmw3360.h"
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2021-06-05 17:08:35 +02:00
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#include "wait.h"
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#include "debug.h"
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#include "print.h"
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2020-12-19 19:43:00 +01:00
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#include "pmw3360_firmware.h"
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2021-08-21 06:14:23 +02:00
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// Registers
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#define REG_Product_ID 0x00
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#define REG_Revision_ID 0x01
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#define REG_Motion 0x02
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#define REG_Delta_X_L 0x03
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#define REG_Delta_X_H 0x04
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#define REG_Delta_Y_L 0x05
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#define REG_Delta_Y_H 0x06
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#define REG_SQUAL 0x07
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#define REG_Raw_Data_Sum 0x08
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#define REG_Maximum_Raw_data 0x09
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#define REG_Minimum_Raw_data 0x0A
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#define REG_Shutter_Lower 0x0B
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#define REG_Shutter_Upper 0x0C
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#define REG_Control 0x0D
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#define REG_Config1 0x0F
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#define REG_Config2 0x10
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#define REG_Angle_Tune 0x11
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#define REG_Frame_Capture 0x12
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#define REG_SROM_Enable 0x13
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#define REG_Run_Downshift 0x14
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#define REG_Rest1_Rate_Lower 0x15
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#define REG_Rest1_Rate_Upper 0x16
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#define REG_Rest1_Downshift 0x17
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#define REG_Rest2_Rate_Lower 0x18
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#define REG_Rest2_Rate_Upper 0x19
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#define REG_Rest2_Downshift 0x1A
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#define REG_Rest3_Rate_Lower 0x1B
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#define REG_Rest3_Rate_Upper 0x1C
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#define REG_Observation 0x24
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#define REG_Data_Out_Lower 0x25
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#define REG_Data_Out_Upper 0x26
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#define REG_Raw_Data_Dump 0x29
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#define REG_SROM_ID 0x2A
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#define REG_Min_SQ_Run 0x2B
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#define REG_Raw_Data_Threshold 0x2C
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#define REG_Config5 0x2F
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#define REG_Power_Up_Reset 0x3A
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#define REG_Shutdown 0x3B
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#define REG_Inverse_Product_ID 0x3F
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#define REG_LiftCutoff_Tune3 0x41
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#define REG_Angle_Snap 0x42
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#define REG_LiftCutoff_Tune1 0x4A
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#define REG_Motion_Burst 0x50
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#define REG_LiftCutoff_Tune_Timeout 0x58
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#define REG_LiftCutoff_Tune_Min_Length 0x5A
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#define REG_SROM_Load_Burst 0x62
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#define REG_Lift_Config 0x63
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#define REG_Raw_Data_Burst 0x64
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#define REG_LiftCutoff_Tune2 0x65
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2020-12-19 19:43:00 +01:00
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2021-08-21 06:14:23 +02:00
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bool _inBurst = false;
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2020-12-19 19:43:00 +01:00
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void print_byte(uint8_t byte) { dprintf("%c%c%c%c%c%c%c%c|", (byte & 0x80 ? '1' : '0'), (byte & 0x40 ? '1' : '0'), (byte & 0x20 ? '1' : '0'), (byte & 0x10 ? '1' : '0'), (byte & 0x08 ? '1' : '0'), (byte & 0x04 ? '1' : '0'), (byte & 0x02 ? '1' : '0'), (byte & 0x01 ? '1' : '0')); }
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bool spi_start_adv(void) {
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2021-08-21 06:14:23 +02:00
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bool status = spi_start(PMW3360_CS_PIN, PMW3360_SPI_LSBFIRST, PMW3360_SPI_MODE, PMW3360_SPI_DIVISOR);
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2020-12-19 19:43:00 +01:00
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wait_us(1);
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return status;
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}
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void spi_stop_adv(void) {
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wait_us(1);
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spi_stop();
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}
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spi_status_t spi_write_adv(uint8_t reg_addr, uint8_t data) {
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if (reg_addr != REG_Motion_Burst) {
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_inBurst = false;
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}
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spi_start_adv();
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// send address of the register, with MSBit = 1 to indicate it's a write
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spi_status_t status = spi_write(reg_addr | 0x80);
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2021-06-21 22:00:11 +02:00
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status = spi_write(data);
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2020-12-19 19:43:00 +01:00
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// tSCLK-NCS for write operation
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wait_us(20);
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// tSWW/tSWR (=120us) minus tSCLK-NCS. Could be shortened, but is looks like a safe lower bound
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wait_us(100);
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spi_stop();
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return status;
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}
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uint8_t spi_read_adv(uint8_t reg_addr) {
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spi_start_adv();
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// send adress of the register, with MSBit = 0 to indicate it's a read
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spi_write(reg_addr & 0x7f);
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uint8_t data = spi_read();
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// tSCLK-NCS for read operation is 120ns
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wait_us(1);
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// tSRW/tSRR (=20us) minus tSCLK-NCS
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wait_us(19);
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spi_stop();
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return data;
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}
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void pmw_set_cpi(uint16_t cpi) {
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uint8_t cpival = constrain((cpi / 100) - 1, 0, 0x77); // limits to 0--119
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2020-12-19 19:43:00 +01:00
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spi_start_adv();
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spi_write_adv(REG_Config1, cpival);
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spi_stop();
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}
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2021-06-21 22:00:11 +02:00
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uint16_t pmw_get_cpi(void) {
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uint8_t cpival = spi_read_adv(REG_Config1);
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return (uint16_t)(cpival & 0xFF) * 100;
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}
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2020-12-19 19:43:00 +01:00
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bool pmw_spi_init(void) {
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2021-08-21 06:14:23 +02:00
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setPinOutput(PMW3360_CS_PIN);
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2021-06-21 22:00:11 +02:00
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2020-12-19 19:43:00 +01:00
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spi_init();
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_inBurst = false;
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spi_stop();
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spi_start_adv();
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spi_stop();
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2021-06-21 22:00:11 +02:00
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spi_write_adv(REG_Shutdown, 0xb6); // Shutdown first
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2020-12-19 19:43:00 +01:00
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wait_ms(300);
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spi_start_adv();
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wait_us(40);
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spi_stop_adv();
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wait_us(40);
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spi_write_adv(REG_Power_Up_Reset, 0x5a);
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wait_ms(50);
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spi_read_adv(REG_Motion);
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spi_read_adv(REG_Delta_X_L);
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spi_read_adv(REG_Delta_X_H);
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spi_read_adv(REG_Delta_Y_L);
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spi_read_adv(REG_Delta_Y_H);
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pmw_upload_firmware();
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spi_stop_adv();
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wait_ms(10);
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2021-08-21 06:14:23 +02:00
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pmw_set_cpi(PMW3360_CPI);
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2020-12-19 19:43:00 +01:00
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wait_ms(1);
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spi_write_adv(REG_Config2, 0x00);
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spi_write_adv(REG_Angle_Tune, constrain(ROTATIONAL_TRANSFORM_ANGLE, -30, 30));
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2021-06-21 22:00:11 +02:00
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bool init_success = pmw_check_signature();
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2021-08-21 06:14:23 +02:00
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writePinLow(PMW3360_CS_PIN);
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2021-06-21 22:00:11 +02:00
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return init_success;
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}
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void pmw_upload_firmware(void) {
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2020-12-19 19:43:00 +01:00
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spi_write_adv(REG_SROM_Enable, 0x1d);
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wait_ms(10);
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spi_write_adv(REG_SROM_Enable, 0x18);
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spi_start_adv();
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spi_write(REG_SROM_Load_Burst | 0x80);
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wait_us(15);
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unsigned char c;
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for (int i = 0; i < firmware_length; i++) {
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c = (unsigned char)pgm_read_byte(firmware_data + i);
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spi_write(c);
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wait_us(15);
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}
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wait_us(200);
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spi_read_adv(REG_SROM_ID);
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spi_write_adv(REG_Config2, 0x00);
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spi_stop();
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wait_ms(10);
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}
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bool pmw_check_signature(void) {
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uint8_t pid = spi_read_adv(REG_Product_ID);
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uint8_t iv_pid = spi_read_adv(REG_Inverse_Product_ID);
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uint8_t SROM_ver = spi_read_adv(REG_SROM_ID);
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return (pid == 0x42 && iv_pid == 0xBD && SROM_ver == 0x04); // signature for SROM 0x04
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}
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report_pmw_t pmw_read_burst(void) {
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if (!_inBurst) {
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dprintf("burst on");
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spi_write_adv(REG_Motion_Burst, 0x00);
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_inBurst = true;
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}
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spi_start_adv();
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spi_write(REG_Motion_Burst);
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wait_us(35); // waits for tSRAD
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report_pmw_t data;
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data.motion = 0;
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data.dx = 0;
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data.mdx = 0;
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data.dy = 0;
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data.mdx = 0;
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data.motion = spi_read();
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spi_write(0x00); // skip Observation
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data.dx = spi_read();
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data.mdx = spi_read();
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data.dy = spi_read();
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data.mdy = spi_read();
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spi_stop();
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2021-08-13 23:20:47 +02:00
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if (debug_mouse) {
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print_byte(data.motion);
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print_byte(data.dx);
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print_byte(data.mdx);
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print_byte(data.dy);
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print_byte(data.mdy);
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dprintf("\n");
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}
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2020-12-19 19:43:00 +01:00
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data.isMotion = (data.motion & 0x80) != 0;
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data.isOnSurface = (data.motion & 0x08) == 0;
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data.dx |= (data.mdx << 8);
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data.dx = data.dx * -1;
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data.dy |= (data.mdy << 8);
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data.dy = data.dy * -1;
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spi_stop();
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if (data.motion & 0b111) { // panic recovery, sometimes burst mode works weird.
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_inBurst = false;
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}
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return data;
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}
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